Abstract: A solution for performing incremental mutation coverage testing is disclosed. The solution can identify, for a cycle of a test, a first signal not covered during preceding cycles of the test and select, for the current cycle, a first value for the first signal. The solution can, responsive to the first value, determine whether the first signal is covered by the test in the current cycle and identify whether a first assertion not covered during the one or more preceding cycles is covered in the current cycle. The solution can remove the first signal from a list of signals if it determines that it is not covered by the test and remove the first assertion from a list of assertions if the first assertion is determined to be covered. The system can identify, for a next cycle, a second signal from the updated one or more signals for the circuit.

Abstract: A method for formal deep bug hunting in a device under test (DUT) may include obtaining a selection of a start state for the DUT; obtaining a selection of one or a plurality of variables that are declared as random variables; for each of said one or a plurality of random variables, generating a sequence of random values in a generation order using a random number generator (RNG); and performing formal verification exploration of the DUT starting at the start state and consecutively assigning each of said one or a plurality of random variables a value from the sequence of values in the generation order.

Abstract: A system and method for generalized next-state-directed constrained random simulation may include obtaining an initial state for a finite state machine (FSM) constrained by a first Boolean random circuit; and unrolling the FSM, wherein each step of steps of the unrolling, except for a final step, is constrained by the first Boolean random circuit that defines a set of generalized cycles, and wherein the final step is constrained by a second Boolean random circuit.