Abstract: In the conventional address transition detection circuit of a memory device, same signals are generated in a normal operation state, and in a noise induced operation state thereby unwanted ATD pulses are generated by the noises activating the internal circuit related to these, thus causing malfunctions. In order to solve such problems, the present invention, by inverting outputs of the first and second delay/inversion units and then inputting the inverted signals into the cross coupled logic combination unit, enables one to distinguish between two operations. This is achieved by gaining ATD pulse width during a normal operation and by receiving the noise pulse width unchanged. Accordingly, by evaluating the ATD pulse width, one can determine whether it is an ATD operation by a normal address transition or whether an unnecessary ATD operation by the noises. Also, the operation of the internal circuit related to these can be controlled, thus preventing the malfunctions caused by the noises.