Patents by Inventor Gwang-soo Kim
Gwang-soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240155152Abstract: According to the present invention, an image encoding apparatus comprises: a motion prediction unit which derives motion information on a current block in the form of the motion information including L0 motion information and L1 motion information; a motion compensation unit which performs a motion compensation for the current block on the basis of at least one of the L0 motion information and L1 motion information so as to generate a prediction block corresponding to the current block; and a restoration block generating unit which generates a restoration block corresponding to the current block based on the prediction block. According to the present invention, image encoding efficiency can be improved.Type: ApplicationFiled: January 16, 2024Publication date: May 9, 2024Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, University-Industry Cooperation Group of Kyung Hee UniversityInventors: Hui Yong KIM, Gwang Hoon PARK, Kyung Yong KIM, Sang Min KIM, Sung Chang LIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM
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Publication number: 20240133519Abstract: A liquefied gas storage tank includes a corner block disposed on a corner portion, wherein the corner block includes a lower block, an upper block and an upper connecting block, the upper block includes a first inner fixing unit and a second inner fixing unit respectively provided inside a first surface and a second surface, bonded and connected to a secondary barrier, and each having a structure in which a primary inner plywood, a primary corner insulating material, and a primary outer plywood are stacked, and an inner bent portion installed at a corner spatial portion between the first inner fixing unit and the second inner fixing unit, and both side surfaces of the inner bent portion that are perpendicular to the secondary barrier each have a height reduced from a total height of each of the first and second inner fixing units.Type: ApplicationFiled: December 14, 2021Publication date: April 25, 2024Inventors: Won Seok HEO, Seong Bo PARK, Hye Min CHO, Ki Joong KIM, Cheon Jin PARK, Min Kyu PARK, Jung Kyu PARK, Byeong Jin JEONG, Dong Woo KIM, Sung Kyu HONG, Gwang Soo GO, Jee Yeon HEO
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Patent number: 11962766Abstract: The present invention relates to an encoding method and decoding method, and a device using the same. The encoding method according to the present invention comprises the steps of: specifying an intra prediction mode for a current block; and scanning a residual signal by intra prediction of the current block, wherein the step of scanning the residual signal can determine a scanning type for a luminance signal and a chroma signal of the current block according to an intra prediction mode for a luminance sample of the current block.Type: GrantFiled: April 9, 2021Date of Patent: April 16, 2024Assignees: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee UniversityInventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
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Publication number: 20240107002Abstract: A method for coding image information includes generating prediction information by predicting information on a current coding unit, and determining whether the information on the current coding unit is the same as the prediction information. When the information on the current coding unit is the same as the prediction information, a flag indicating that the information on the current coding unit is the same as the prediction information is coded and transmitted. When the information on the current coding unit is not the same as the prediction information, a flag indicating that the information on the current coding unit is not the same as the prediction information and the information on the current coding unit are coded and transmitted.Type: ApplicationFiled: December 6, 2023Publication date: March 28, 2024Applicants: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee UniversityInventors: Se Yoon JEONG, Hui Yong KIM, Sung Chang LIM, Jin Ho LEE, Ha Hyun LEE, Jong Ho KIM, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Gwang Hoon PARK, Kyung Yong KIM, Tae Ryong KIM, Han Soo LEE
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Publication number: 20240104756Abstract: An apparatus for measuring a depth of a tread groove may include: a camera module capturing a video including an upper end portion of a tire while rotating around an upper end portion of the tire having a plurality of tread grooves, the video including a plurality of frames; a control module obtaining, based on the plurality of frames, a cross-sectional width of the tire in units of pixels by adding widths and depths of each of the plurality of tread grooves in units of pixels, a width of an inner block in units of pixels, and a width of an outer block in units of pixels, the inner and outer blocks are disposed on the tire; and a conversion module converting the depth of the tread groove in units of pixels into the depth in units of pixels.Type: ApplicationFiled: January 6, 2023Publication date: March 28, 2024Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Jung Mo KOO, Kyoung Soo WE, Hye Yeon LEE, Gwang Jin KIM, Hyung Il KOO
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Publication number: 20240084969Abstract: The liquefied gas storage tank includes a primary barrier, a primary insulation wall, a secondary barrier, and a secondary insulation wall. In a state where unit elements are arranged adjacent to each other, each of the unit elements being formed by stacking the secondary insulation wall, the secondary barrier, and a fixed insulation wall which is a part of the primary insulation wall, the primary insulation wall may comprise: a connection insulation wall provided in the space between the adjacent fixed insulation walls; first slits formed between the fixed insulation walls and the connection insulation wall when the connection insulation wall is inserted and installed between the adjacent fixed insulation walls; a plurality of second slits formed in a lengthwise direction and a widthwise direction of the fixed insulation walls; and a first insulating filler material for filling the first slits.Type: ApplicationFiled: December 15, 2021Publication date: March 14, 2024Inventors: Seong Bo PARK, Won Seok HEO, Hye Min CHO, Ki Joong KIM, Cheon Jin PARK, Min Kyu PARK, Jung Kyu PARK, Byeong Jin JEONG, Dong Woo KIM, Sung Kyu HONG, Gwang Soo GO, Jee Yeon HEO
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Publication number: 20240073416Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, Universily-lndustry Cooperation Group of Kyung Hee UniversityInventors: Sung Chang LIM, Ha Hyun LEE, Se Yoon JEONG, Hui Yong KIM, Suk Hee CHO, Jong Ho KIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Dong Gyu SIM, Seoung Jun OH, Gwang Hoon PARK, Sea Nae PARK, Chan Woong JEON
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Patent number: 11917193Abstract: According to the present invention, an image encoding apparatus comprises: a motion prediction unit which derives motion information on a current block in the form of the motion information including L0 motion information and L1 motion information; a motion compensation unit which performs a motion compensation for the current block on the basis of at least one of the L0 motion information and L1 motion information so as to generate a prediction block corresponding to the current block; and a restoration block generating unit which generates a restoration block corresponding to the current block based on the prediction block. According to the present invention, image encoding efficiency can be improved.Type: GrantFiled: February 4, 2020Date of Patent: February 27, 2024Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, University-Industry Cooperation Group of Kyung Hee UniversityInventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sang Min Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
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Publication number: 20240006332Abstract: An integrated circuit (IC) device comprises a host component and an IC die directly bonded to the host component. The IC die comprises a substrate material layer and a die metallization level between the substrate material layer and host component. The IC die includes an upper die alignment fiducial between the die metallization level and host component. The upper die alignment fiducial at least partially overlaps one or more metallization features within the die metallization level. In embodiments, at least two orthogonal edges of the upper die alignment fiducial do not overlap any of the metallization features within the die metallization level. In embodiments, the IC die includes a lower die alignment fiducial between the substrate material layer and the die metallization level. The lower die alignment fiducial may at least partially overlap one or more second metallization features within a second die metallization level of the IC die.Type: ApplicationFiled: July 1, 2022Publication date: January 4, 2024Applicant: Intel CorporationInventors: Dimitrios Antartis, Nitin A. Deshpande, Siyan Dong, Omkar Karhade, Gwang-soo Kim, Shawna Liff, Siddhartha Mal, Debendra Mallik, Khant Minn, Haris Khan Niazi, Arnab Sarkar, Yi Shi, Botao Zhang
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Publication number: 20240006347Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to fabricating passive circuits on a surface of a BEOL of a package, for example on a C4 connection layer of the BEOL. In embodiments, the passive circuits may be fabricated using a standard bump process. Other embodiments may be described and/or claimed.Type: ApplicationFiled: June 29, 2022Publication date: January 4, 2024Inventors: Qiang YU, Georgios C. DOGIAMIS, Gwang-Soo KIM, Ibukunoluwa MOMSON, Ali FARID, Said RAMI
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Publication number: 20230299123Abstract: In one embodiment, an apparatus includes a first integrated circuit die with metal bonding pads that are co-planar with an external surface of the die and a second integrated circuit die with metal bonding pads that are co-planar with an external surface of the die. The first and second integrated circuit dies are coupled together such that their external surfaces are in contact and the metal pads of the first integrated circuit die are in direct contact with respective metal pads of the second integrated circuit die. The apparatus also includes an inductor formed at least partially by the metal pads of the first integrated circuit die and the metal pads of the second integrated circuit die.Type: ApplicationFiled: March 18, 2022Publication date: September 21, 2023Applicant: Intel CorporationInventors: Qiang Yu, Gwang-Soo Kim, Said Rami
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Publication number: 20230207486Abstract: An integrated circuit (IC) die comprises a first metallization layer comprising first interconnect structures which each extend through the first metallization layer, a second metallization layer comprising second interconnect structures which each extend through the second metallization layer, an interlayer dielectric (ILD) stack between the first metallization layer and the second metallization layer. The ILD stack comprises a stress modulation layer on the first metallization layer and a capping layer on the stress modulation layer. A first intrinsic stress in a first material of the stress modulation layer is to mitigate a second intrinsic stress in the first metallization layer.Type: ApplicationFiled: December 24, 2021Publication date: June 29, 2023Applicant: Intel CorporationInventors: Gwang-Soo Kim, Dimitrios Antartis, Han Ju Lee, Christopher Pelto
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Publication number: 20230207525Abstract: A packaged device comprises first die stack and a third die. The first die stack includes a first die comprising first conductive contacts each at a first side of the first die, and a second die comprising second conductive contacts each at a second side of the second die. First solder bonds which each extend to a respective one of the first conductive contacts. The third die comprises third conductive contacts each at a third side of the third die. The third die is coupled to the first die stack via second solder bonds which each extend to a respective one of the second conductive contacts, and to a respective one of the third conductive contacts. Each die of the first die stack is coupled to each of a respective one or more other dies of the first die stack via respective hybrid bonds.Type: ApplicationFiled: December 24, 2021Publication date: June 29, 2023Applicant: Intel CorporationInventors: Debendra Mallik, Sriram Srinivasan, Christopher Pelto, Gwang-Soo Kim, Nitin Deshpande, Omkar Karhade
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Publication number: 20230197637Abstract: Stacked die assemblies having a moisture sealant layer according to embodiments are described herein. A microelectronic package structure having a first die with a second and an adjacent third die on the first die. Each of the second and third die comprise hybrid bonding interfaces with the first die. A first layer is on a region of the first die adjacent sidewalls of the second and the third dies, and adjacent an edge portion of the first die. The first layer comprises a diffusion barrier material A second layer is over the first layer, the second layer, wherein a top surface of the second layer is substantially coplanar with the top surfaces of the second and third dies. The first layer provides a hermetic moisture sealant layer for stacked die package structures.Type: ApplicationFiled: December 17, 2021Publication date: June 22, 2023Applicant: Intel CorporationInventors: Debendra Mallik, Mohammad Enamul Kabir, Nitin Deshpande, Omkar Karhade, Arnab Sarkar, Sairam Agraharam, Christopher Pelto, Gwang-Soo Kim, Ravindranath Mahajan
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Patent number: 11444148Abstract: An inductor is disclosed. The inductor includes a vertically coiled conductor, a metal contact coupled to a first end of the vertically coiled conductor, and a dielectric material coupled to the metal contact. A tunable high permittivity component is coupled to a second end of the vertically coiled conductor.Type: GrantFiled: December 17, 2018Date of Patent: September 13, 2022Assignee: Intel CorporationInventors: Gwang-Soo Kim, Aaron D. Lilak, Kumhyo Byon, Doug Ingerly
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Patent number: 10811354Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems associated with a fuse array of an integrated circuit. An integrated circuit may include a first metallization layer including a plurality of trenches separated by an interlayer dielectric (ILD), wherein the ILD forms a protrusion that extends above a top surface of the trenches. An etch stop layer may be disposed on the first metallization layer. The integrated circuit may further include a fuse disposed on the etch stop layer, wherein the fuse includes a fuse channel coupled between an anode and a cathode, wherein the fuse channel is disposed directly above the protrusion and is in contact with the etch stop layer. The integrated circuit may additionally or alternatively include one or more dummy regions adjacent to the fuse channel and separated from the fuse channel by a dielectric material. Other embodiments may be described and/or claimed.Type: GrantFiled: June 30, 2016Date of Patent: October 20, 2020Assignee: Intel CorporationInventors: Gwang-Soo Kim, Doug B. Ingerly
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Publication number: 20200194540Abstract: An inductor is disclosed. The inductor includes a vertically coiled conductor, a metal contact coupled to a first end of the vertically coiled conductor, and a dielectric material coupled to the metal contact. A tunable high permittivity component is coupled to a second end of the vertically coiled conductor.Type: ApplicationFiled: December 17, 2018Publication date: June 18, 2020Inventors: Gwang-Soo KIM, Aaron D. LILAK, Kumhyo BYON, Doug INGERLY
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Publication number: 20190326216Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems associated with a fuse array of an integrated circuit. An integrated circuit may include a first metallization layer including a plurality of trenches separated by an interlayer dielectric (ILD), wherein the ILD forms a protrusion that extends above a top surface of the trenches. An etch stop layer may be disposed on the first metallization layer. The integrated circuit may further include a fuse disposed on the etch stop layer, wherein the fuse includes a fuse channel coupled between an anode and a cathode, wherein the fuse channel is disposed directly above the protrusion and is in contact with the etch stop layer. The integrated circuit may additionally or alternatively include one or more dummy regions adjacent to the fuse channel and separated from the fuse channel by a dielectric material. Other embodiments may be described and/or claimed.Type: ApplicationFiled: June 30, 2016Publication date: October 24, 2019Inventors: GWANG-SOO KIM, DOUG B. INGERLY
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Patent number: 7768775Abstract: A display device includes: a display unit which displays an image; a casing which supports the display unit; a pair of supporting members which are respectively combined at peripheral areas of a backside of the display unit and are supported by the casing; and a connecting member which has higher heat resistance than the supporting members and interconnects the supporting members.Type: GrantFiled: December 11, 2007Date of Patent: August 3, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Gwang-soo Kim
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Publication number: 20080316690Abstract: A display device includes: a display unit which displays an image; a casing which supports the display unit; a pair of supporting members which are respectively combined at peripheral areas of a backside of the display unit and are supported by the casing; and a connecting member which has higher heat resistance than the supporting members and interconnects the supporting members.Type: ApplicationFiled: December 11, 2007Publication date: December 25, 2008Applicant: Samsung Elecronics Co., Ltd.Inventor: Gwang-soo KIM