Abstract: A method for coding image information includes generating prediction information by predicting information on a current coding unit, and determining whether the information on the current coding unit is the same as the prediction information. When the information on the current coding unit is the same as the prediction information, a flag indicating that the information on the current coding unit is the same as the prediction information is coded and transmitted. When the information on the current coding unit is not the same as the prediction information, a flag indicating that the information on the current coding unit is not the same as the prediction information and the information on the current coding unit are coded and transmitted.

Abstract: The present invention relates to an image encoding and decoding technique, and more particularly, to an image encoder and decoder using unidirectional prediction. The image encoder includes a dividing unit to divide a macro block into a plurality of sub-blocks, a unidirectional application determining unit to determine whether an identical prediction mode is applied to each of the plurality of sub-blocks, and a prediction mode determining unit to determine a prediction mode with respect to each of the plurality of sub-blocks based on a determined result of the unidirectional application determining unit.

Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.

Abstract: A power voltage generator includes a voltage sensor and a power controller. The voltage sensor is configured to sense a first voltage in a first charge sharing period of a gate clock signal and a second voltage in a second charge sharing period of the gate clock signal. The power breaker is configured to disconnect a power based on the first voltage and the second voltage.

Abstract: A display apparatus includes a display panel, a timing controller and a power management integrated circuit (PMIC). The timing controller is to control an operation of the display panel and to store a plurality of fault patterns to be displayed on the display panel to represent that a plurality of defective phenomena have occurred. The PMIC is to supply a first power supply voltage to the timing controller and to monitor whether the plurality of defective phenomena have occurred. When a first defective phenomenon among the plurality of defective phenomena is sensed, the PMIC is to store first fault data and to shut down the display panel. When the first defective phenomenon is sensed, the timing controller is to control the display panel to display a first fault pattern corresponding to the first defective phenomenon among the plurality of fault patterns before the display panel is shut down.

Abstract: A power voltage generator includes a voltage sensor and a power controller. The voltage sensor is configured to sense a first voltage in a first charge sharing period of a gate clock signal and a second voltage in a second charge sharing period of the gate clock signal. The power breaker is configured to disconnect a power based on the first voltage and the second voltage.

Abstract: A display apparatus includes a display panel, a timing controller and a power management integrated circuit (PMIC). The timing controller is to control an operation of the display panel and to store a plurality of fault patterns to be displayed on the display panel to represent that a plurality of defective phenomena have occurred. The PMIC is to supply a first power supply voltage to the timing controller and to monitor whether the plurality of defective phenomena have occurred. When a first defective phenomenon among the plurality of defective phenomena is sensed, the PMIC is to store first fault data and to shut down the display panel. When the first defective phenomenon is sensed, the timing controller is to control the display panel to display a first fault pattern corresponding to the first defective phenomenon among the plurality of fault patterns before the display panel is shut down.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display device includes a display panel including: a plurality of pixels; and a signal controller which generates, on a frame-by-frame basis, a display signal based on an input image signal and a control signal from an outside. The signal controller includes a memory which stores a preset image signal, a receiver which receives the control signal, a clock signal modulator which generates an internal clock signal having a first frequency during a blank period, which is determined based on the control signal in a frame period, and a data processor which reads the preset image signal from the memory in response to the internal clock signal for an image processing.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display panel driving apparatus includes a data driving part, a gate driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be enhanced.

Abstract: A display device includes a display panel including: a plurality of pixels; and a signal controller which generates, on a frame-by-frame basis, a display signal based on an input image signal and a control signal from an outside. The signal controller includes a memory which stores a preset image signal, a receiver which receives the control signal, a clock signal modulator which generates an internal clock signal having a first frequency during a blank period, which is determined based on the control signal in a frame period, and a data processor which reads the preset image signal from the memory in response to the internal clock signal for an image processing.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display panel driving apparatus includes a timing controlling part, a data driving part and a gate driving part. The timing controlling part outputs a first line data of an image data, and determines whether the first line data and a second line data next to the first line data are the same. The data driving part outputs a first line data signal based on the first line data to a data line corresponding to a first line, and outputs the first line data signal based on the first line data to a data line corresponding to a second line, when the first line data and the second line data are the same.