Patents by Inventor Gweltaz M. Gaudin

Gweltaz M. Gaudin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120043647
    Abstract: The invention relates to a process for assembling a first element that includes at least one first wafer, substrate or at least one chip, and a second element of at least one second wafer or substrate, involving the formation of a surface layer, known as the bonding layer, on each substrate, at least one of these bonding layers being formed at a temperature less than or equal to 300° C.; conducting a first annealing, known as degassing annealing, of the bonding layers, before assembly, at least partly at a temperature at least equal to the subsequent bonding interface strengthening temperature but below 450° C.; forming an assembling of the substrates by bringing into contact the exposed surfaces of the bonding layers, and conducting an annealing of the assembled structure at a bonding interface strengthening temperature below 450° C.
    Type: Application
    Filed: October 14, 2010
    Publication date: February 23, 2012
    Inventor: Gweltaz M. Gaudin