Patents by Inventor Gwen Chang

Gwen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of improving device resistance
    Patent number: 6849526
    Abstract: A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: February 1, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiun-Ren Lai, Chun-Yi Yang, Shi-Xian Chen, Gwen Chang
  • [STRUCTURE OF A MEMORY DEVICE AND FABRICATION METHOD THEREOF]
    Publication number: 20040161896
    Abstract: A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 19, 2004
    Inventors: Jiun-Ren Lai, Chun-Yi Yang, Shi-Xian Chen, Gwen Chang
  • Structure of a memory device with buried bit line
    Patent number: 6720629
    Abstract: A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: April 13, 2004
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiun-Ren Lai, Chun-Yi Yang, Shi-Xian Chen, Gwen Chang
  • STRUCTURE OF A MEMORY DEVICE AND FABRICATION METHOD THEREOF
    Publication number: 20040004256
    Abstract: A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
    Type: Application
    Filed: October 8, 2002
    Publication date: January 8, 2004
    Inventors: Jiun-Ren Lai, Chun-Yi Yang, Shi-Xian Chen, Gwen Chang