Patents by Inventor Gwo Liang Weng

Gwo Liang Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040113266
    Abstract: A process for fabricating a multi-chip package module is disclosed. A substrate, at least a first chip and at least a second chip are provided. The backside of the first chip is attached to a die pad on a substrate. A wire-bonding operation is carried out to electrically connect the first chip and the substrate through conductive wires. A plurality of bumps is bonded to the second chip so that one end of each bump is bonded to a contact on the second chip. Thereafter, the other end of each bump is bonded to a contact on the substrate so that the second chip and the substrate are physically and electrically connected together. Finally, an encapsulation process is performed to form a packaging material enclosing the first chip, the second chip, the conductive wires, the bumps and the substrate.
    Type: Application
    Filed: August 18, 2003
    Publication date: June 17, 2004
    Inventors: SHIH-CHANG LEE, GWO-LIANG WENG, WEI-CHANG TAI, CHENG-YIN LEE
  • Publication number: 20040089879
    Abstract: A flip chip package mainly comprises a chip, a leadless lead frame. The leadless lead frame has a die paddle and a plurality of leads. The active surface of the chip has a plurality of bonding pads formed thereon. Besides, a plurality of bumps formed on the bonding pads are electrically connected to the chip, the leads and the die paddle. Therein, the die paddle electrically connected to the chip via the bumps not only prevents the chip from being dislocated but also provides another grounding and heat transmission paths to enhance the electrical, thermal and mechanical performance of the flip chip package. Similarly, the bumps formed on the bonding pads of the chip are electrically connected to the leads so as to fix the chip to the lead frame more securely.
    Type: Application
    Filed: September 9, 2003
    Publication date: May 13, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Gwo-Liang Weng, Wei-Chang Tai, Cheng-Yin Lee
  • Publication number: 20040080036
    Abstract: A system in package structure includes a first substrate, a first chip, a first heat-dissipating component, a second substrate, and a second chip. In this case, the first chip is formed on and electrically connected to the first substrate, and the first heat-dissipating component having a heat-conducting portion is formed above the first chip. The second chip is formed on and electrically connected to the second substrate. The second substrate is set above the first heat-dissipating component and electrically connected to the first substrate.
    Type: Application
    Filed: October 23, 2003
    Publication date: April 29, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ching-Hui Chang, Shih-Chang Lee, Wei-Chang Tai, Gwo-Liang Weng, Cheng-Yin Lee
  • Patent number: 6465277
    Abstract: A molding apparatus for use in forming a flexible substrate based package comprises a plurality of pots. Two flexible substrates are installed at two sides of the pots. A plurality of sets of chips mounted on the upper surface of the substrate wherein each set of chips is in an array arrangement. The molding apparatus further comprises a plurality of runners. Each runner independently extends from one side of the pot to one side of the substrate, and connects to a cavity of a upper part of a mold disposed on the substrate through a gate. The present invention characterized in that, the molding apparatus is provided with a first communication channel formed corresponding to one side of the substrate and a second communication channel formed corresponding to the other side of the substrate. The first and the second communication channels interconnect the cavities at two opposite sides thereof.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: October 15, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Gwo Liang Weng
  • Publication number: 20010018109
    Abstract: A molding apparatus for use in forming a flexible substrate based package comprises a plurality of pots. Two flexible substrates are installed at two sides of the pots. A plurality of sets of chips mounted on the upper surface of the substrate wherein each set of chips is in an array arrangement. The molding apparatus further comprises a plurality of runners. Each runner independently extends from one side of the pot to one side of the substrate, and connects to a cavity of a upper part of a mold disposed on the substrate through a gate. The present invention characterized in that, the molding apparatus is provided with a first communication channel formed corresponding to one side of the substrate and a second communication channel formed corresponding to the other side of the substrate. The first and the second communication channels interconnect the cavities at two opposite sides thereof.
    Type: Application
    Filed: May 15, 2001
    Publication date: August 30, 2001
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Gwo Liang Weng
  • Patent number: 6257857
    Abstract: A molding apparatus for use in forming a flexible substrate based package comprises a plurality of pots. Two flexible substrates are installed at two sides of the pots. A plurality of sets of chips mounted on the upper surface of the substrate wherein each set of chips is in an array arrangement. The molding apparatus further comprises a plurality of runners. Each runner independently extends from one side of the pot to one side of the substrate, and connects to a cavity of a upper part of a mold disposed on the substrate through a gate. The present invention characterized in that, the molding apparatus is provided with a first communication channel formed corresponding to one side of the substrate and a second communication channel formed corresponding to the other side of the substrate. The first and the second communication channels interconnect the cavities at two opposite sides thereof.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: July 10, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Gwo Liang Weng