Patents by Inventor Gwo-Shil Yang

Gwo-Shil Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7179732
    Abstract: An interconnection structure and a fabrication method thereof. A first organic low-k material layer, a stress redistribution layer, a second organic low-k dielectric layer are formed in sequence over a substrate, followed by forming an opening in the first organic low-k material layer, the stress redistribution layer, and the second organic low-k dielectric layer. The opening is then filled with a conductive material to form an interconnection structure. The stress redistribution layer has a heat expansion coefficient closer to that of the substrate, while such heat expansion coefficient differs more significantly from those of the first and second organic low-k material layers.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: February 20, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Chiung-Sheng Hsiung, Chih-Chao Yang, Gwo-Shil Yang, Ming-Shih Yeh, Jen-Kon Chen
  • Patent number: 6890851
    Abstract: An interconnection structure and a fabrication method thereof. A first organic low-k material layer, a stress redistribution layer, a second organic low-k dielectric layer are formed in sequence over a substrate, followed by forming an opening in the first organic low-k material layer, the stress redistribution layer, and the second organic low-k dielectric layer. The opening is then filled with a conductive material to form an interconnection structure. The stress redistribution layer has a heat expansion coefficient closer to that of the substrate, while such heat expansion coefficient differs more significantly from those of the first and second organic low-k material layers.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: May 10, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Chiung-Sheng Hsiung, Chih-Chao Yang, Gwo-Shil Yang, Ming-Shih Yeh, Jen-Kon Chen
  • Publication number: 20050001321
    Abstract: An interconnection structure and a fabrication method thereof. A first organic low-k material layer, a stress redistribution layer, a second organic low-k dielectric layer are formed in sequence over a substrate, followed by forming an opening in the first organic low-k material layer, the stress redistribution layer, and the second organic low-k dielectric layer. The opening is then filled with a conductive material to form an interconnection structure. The stress redistribution layer has a heat expansion coefficient closer to that of the substrate, while such heat expansion coefficient differs more significantly from those of the first and second organic low-k material layers.
    Type: Application
    Filed: July 15, 2004
    Publication date: January 6, 2005
    Inventors: Chiung-Sheng Hsiung, Chih-Chao Yang, Gwo-Shil Yang, Ming-Shih Yeh, Jen-Kon Chen
  • Publication number: 20040241978
    Abstract: An interconnection structure and a fabrication method thereof. A first organic low-k material layer, a stress redistribution layer, a second organic low-k dielectric layer are formed in sequence over a substrate, followed by forming an opening in the first organic low-k material layer, the stress redistribution layer, and the second organic low-k dielectric layer. The opening is then filled with a conductive material to form an interconnection structure. The stress redistribution layer has a heat expansion coefficient closer to that of the substrate, while such heat expansion coefficient differs more significantly from those of the first and second organic low-k material layers.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Inventors: Chiung-Sheng Hsiung, Chih-Chao Yang, Gwo-Shil Yang, Ming-Shih Yeh, Jen-Kon Chen