Abstract: A circuit board includes a substrate and a metallic layer. A first area and at least one second area are defined on a portion of the substrate, the second area is located outside the first area. The metallic layer includes first test lines disposed on the first area and second test lines disposed on the second area. A first test pad of each of the first test lines has a first width, and a second test pad of each of the second test lines has a second width. The second width is greater than the first width such that probes of an electrical testing tool can contact the first and second test pads on the circuit board correctly during electrical testing.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

Abstract: A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.

Abstract: A flip chip package includes a circuit board, a chip and a solder layer. The chip is mounted on an inner bonding area of the circuit board. The solder layer is located between the circuit board and the chip for bonding bumps to inner leads and a T-shaped circuit unit is on the inner bonding area. The T-shaped circuit unit has a main part, a connection part, and a branch part. The connection part is connected to the main and branch parts, respectively. The main part extends along a lateral direction and the branch part extends outwardly along a longitudinal direction. The connection part is narrower than the main part in width so as to inhibit solder shorts caused by solder overflow on the branch part.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a circuit layer, a flip-chip element and an anti-stress circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. Bonding circuits and transmission circuits of the circuit layer are disposed on the chip mounting area and the circuit area respectively. The flip-chip element is disposed on the chip mounting area and includes bumps and a chip having a long side margin and conductive pads, the bumps are provided to connect the conductive pads and the bonding circuits. Anti-stress circuits of the anti-stress circuit layer are disposed on the chip mounting area and parallel to the long side margin of the chip, and the bumps are located between the anti-stress circuits and the long side margin of the chip.

Abstract: A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.

Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.

Abstract: A chip package includes a circuit board, a chip and an underfill. The circuit board includes a substrate, first circuit lines and second circuit lines. Each of the first circuit lines includes an inner lead and a first line fragment that are disposed on a chip mounting area and an underfill covering area of the substrate, respectively. The second circuit lines are disposed on the chip mounting area and not located between the adjacent inner leads so as to form a wider space between the adjacent first line fragments. The wider space enables the underfill to flow to between the circuit board and the chip and prevents air bubbles from being embedded in the underfill filled between the circuit board and the chip.

Abstract: A flexible circuit board includes a flexible substrate and a stiffening structure, a stiffening area is defined on a bottom surface of the flexible substrate, and the stiffening structure includes a first stiffener and a second stiffener. The first stiffener is disposed on the stiffening area of the bottom surface and the second stiffener is disposed on the first stiffener such that the first stiffener is located between the flexible substrate and the second stiffener. The flexible substrate is protected from punch damage caused by stress concentrations because a cutting line of the flexible substrate only passes through the first stiffener.

Abstract: A flip chip interconnection includes a circuit board, a chip and a solder layer. The chip is mounted on an inner bonding area of the circuit board, the solder layer is located between the circuit board and the chip for bonding bumps to inner leads and a T-shaped circuit unit on the inner bonding area. The T-shaped circuit unit has a main part, a connection part and a branch part, the connection part is connected to the main and branch parts, respectively. The main part extends along a lateral direction and the branch part extends outwardly along a longitudinal direction. The connection part is narrower than the main part in width so as to prevent solder short caused by solder overflow on the branch part.

Abstract: A circuit board electrically connected to a chip includes a substrate and a circuit layer. A first conductive line of the circuit layer includes a main line and a branch lead connected with each other. The branch lead provided to increase lead quantity for bonding with the chip includes an extension part and a bonding part which is used for bonding a bump of the chip. During thermal compression, gaps existing between the extension part and the main line and between the bonding part and the main line can prevent solder on the main line from flowing toward the bump and overflowing from the branch lead.

Abstract: A chip package includes a circuit board, a chip and an underfill. A solder resist layer formed on the circuit board is modified in edge profile so as to reduce required amount of the underfill. The fewer underfill is still enough to be filled between the circuit board and the chip, and still can cover circuit lines that are not covered by the solder resist layer to protect the circuit lines from oxidation.

Abstract: A thin flip chip package structure comprises a substrate, a chip and a heat dissipation paste, the substrate comprises an insulating layer and a trace layer. The insulating layer comprises a top surface, a bottom surface and a plurality of apertures formed at the bottom surface, wherein the bottom surface of the insulating layer comprises a disposing area and a non-disposing area. Each of the apertures is located at the disposing area and comprises a lateral wall and a base surface. A first thickness is formed between the base surface and the insulating layer, a second thickness is formed between the top surface and the bottom surface, and the second thickness is larger than the first thickness. The chip disposed on the top surface comprises a chip surface and a plurality of bumps. The heat dissipation paste at least fills the apertures and contacts the base surface.

Abstract: A thin flip chip package structure comprises a substrate, a chip and a heat dissipation paste, wherein the substrate comprises an insulating layer and a trace layer. The insulating layer comprises a first insulating portion and a second insulating portion, the first insulating portion comprises a first upward surface, a first downward surface, a first thickness and a recess formed on the first downward surface, wherein the recess comprises a bottom surface. The second insulating portion comprises a second upward surface, a second downward surface and a second thickness larger than the first thickness. The trace layer is at least formed on the second insulating portion, the chip disposed on top of the substrate is electrically connected with the trace layer and comprises a plurality of bumps, and the heat dissipation paste is disposed at the recess.

Abstract: A thin flip chip package structure comprises a substrate, a chip and a heat dissipation paste, the substrate comprises an insulating layer and a trace layer. The insulating layer comprises a top surface, a bottom surface and a plurality of apertures formed at the bottom surface, wherein the bottom surface of the insulating layer comprises a disposing area and a non-disposing area. Each of the apertures is located at the disposing area and comprises a lateral wall and a base surface. A first thickness is formed between the base surface and the insulating layer, a second thickness is formed between the top surface and the bottom surface, and the second thickness is larger than the first thickness. The chip disposed on the top surface comprises a chip surface and a plurality of bumps. The heat dissipation paste at least fills the apertures and contacts the base surface.

Abstract: A thin flip chip package structure comprises a substrate, a chip and a heat dissipation paste, wherein the substrate comprises an insulating layer and a trace layer. The insulating layer comprises a first insulating portion and a second insulating portion, the first insulating portion comprises a first upward surface, a first downward surface, a first thickness and a recess formed on the first downward surface, wherein the recess comprises a bottom surface. The second insulating portion comprises a second upward surface, a second downward surface and a second thickness larger than the first thickness. The trace layer is at least formed on the second insulating portion, the chip disposed on top of the substrate is electrically connected with the trace layer and comprises a plurality of bumps, and the heat dissipation paste is disposed at the recess.