Abstract: A microfluidic device comprises first and second inlet passages (13) for respective immiscible fluids, these inlet passages merging into a third passage (8) along which the two fluids flow under parallel laminar flow conditions, the third passage being formed with a constriction or other discontinuity (9) causing the two fluids to form into a flow of alternate segments.

Abstract: A device and method is disclosed enabling centralized electronic distribution of a listing of an item for sale to numerous ecommerce web sites having disparate meta data requirements for their listings. Steps include engaging a plurality of ecommerce web sites to participate; contracting with an owner of an item to distribute sales meta data on the item to the web sites; creating a master electronic content file of sales meta data specific to the item and comprising the composite of the sales meta data required by all the web sites; storing the master electronic content file on a server; deriving a subset of sales meta data for each of the web sites; and, transferring each subset from the server to the respective web site for display. The system of the invention is in computer readable memory encoded with software that enables the steps of the method of the invention.

Abstract: A method of erasing a block of flash memory cells by applying a ramped gate erase voltage to the block of memory cells. When an erase verify of the block of memory cells indicates that erasure has not been successfully completed another erase voltage with a greater absolute value than the initial erase voltage can be applied to the block of memory cells until erasure is complete.

Abstract: A method of erasing a block of flash memory cells by applying a ramped gate erase voltage to the block of memory cells. When an erase verify of the block of memory cells indicates that erasure has not been successfully completed another erase voltage with a greater absolute value than the initial erase voltage can be applied to the block of memory cells until erasure is complete.

Abstract: A method is provided for erasing a memory device including a number of memory cells, the memory cells including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes erasing a group of memory cells to lower a maximum threshold voltage of the group of memory cells below a first predetermined level. The group of memory cells is soft-programmed to raise a minimum threshold voltage of the group of memory cells above a second predetermined level. The group of memory cells is erased, following soft-programming, resulting in a reduced threshold voltage distribution associated with the group of memory cells.