Patents by Inventor GYEONG HAN CHA
GYEONG HAN CHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11134189Abstract: An image device may include a clock generator to generate a first output clock of a first frequency, a link layer to generate a control signal for changing the first frequency and output first parallel data including first frame information, a detector to generate a collision avoidance command to change the first frequency to a second frequency during a vertical blanking time, and a frequency changer to receive the collision avoidance command from the detector and transmit a frequency change command to the link layer. The link layer transmits the control signal to the clock generator based on the frequency change command. The vertical blanking time is a time period from a first time point at which the first parallel data is not output from the link layer to a second time point at which second parallel data is output.Type: GrantFiled: January 15, 2020Date of Patent: September 28, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Ji Un Jeong, Ki Woon Kim, Chae Ryung Kim, Ho Young Kim, Eun Seung Yun, Han Soo Lee, Gyeong Han Cha
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Patent number: 10992447Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: September 17, 2020Date of Patent: April 27, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Publication number: 20210006387Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: September 17, 2020Publication date: January 7, 2021Inventors: HAN SOO LEE, SUNG JUN KIM, CHAE RYUNG KIM, DONG UK PARK, YOUN WOONG CHUNG, JUNG MYUNG CHOI, HAN KYUL LIM, GYEONG HAN CHA
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Publication number: 20200396378Abstract: An image device may include a clock generator to generate a first output clock of a first frequency, a link layer to generate a control signal for changing the first frequency and output first parallel data including first frame information, a detector to generate a collision avoidance command to change the first frequency to a second frequency during a vertical blanking time, and a frequency changer to receive the collision avoidance command from the detector and transmit a frequency change command to the link layer. The link layer transmits the control signal to the clock generator based on the frequency change command. The vertical blanking time is a time period from a first time point at which the first parallel data is not output from the link layer to a second time point at which second parallel data is output.Type: ApplicationFiled: January 15, 2020Publication date: December 17, 2020Inventors: Ji Un JEONG, Ki Woon KIM, Chae Ryung KIM, Ho Young KIM, Eun Seung YUN, Han Soo LEE, Gyeong Han CHA
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Patent number: 10790958Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: April 25, 2019Date of Patent: September 29, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Publication number: 20190260569Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: April 25, 2019Publication date: August 22, 2019Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Patent number: 10313101Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: August 27, 2018Date of Patent: June 4, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Publication number: 20190058574Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: August 27, 2018Publication date: February 21, 2019Inventors: HAN SOO LEE, SUNGJUN KIM, CHAE RYUNG KIM, DONG UK PARK, YOUN WOONG CHUNG, JUNG MYUNG CHOI, HAN KYUL LIM, GYEONG HAN CHA
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Patent number: 10075283Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: August 3, 2017Date of Patent: September 11, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Patent number: 10025345Abstract: A system on chip is provided. The system on chip includes a delay control circuit configured to generate delayed clock signals having different delays, based on each of a first rising edge and a first falling edge of an input clock signal, and generate delayed data signals having different delays, based on each of a second rising edge and a second falling edge of an input data signal. The system on chip further includes a de-skew control circuit configured to control the delay control circuit to adjust a delay of each of the first rising edge, the first falling edge, the second rising edge, and the second falling edge.Type: GrantFiled: October 5, 2016Date of Patent: July 17, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Phil Jae Jeon, Gyeong Han Cha
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Patent number: 9832005Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: January 27, 2016Date of Patent: November 28, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Publication number: 20170331616Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: August 3, 2017Publication date: November 16, 2017Inventors: HAN SOO LEE, SUNG JUN KIM, CHAE RYUNG KIM, DONG UK PARK, YOUN WOONG CHUNG, JUNG MYUNG CHOI, HAN KYUL LIM, GYEONG HAN CHA
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Publication number: 20170097655Abstract: A system on chip is provided. The system on chip includes a delay control circuit configured to generate delayed clock signals having different delays, based on each of a first rising edge and a first falling edge of an input clock signal, and generate delayed data signals having different delays, based on each of a second rising edge and a second falling edge of an input data signal. The system on chip further includes a de-skew control circuit configured to control the delay control circuit to adjust a delay of each of the first rising edge, the first falling edge, the second rising edge, and the second falling edge.Type: ApplicationFiled: October 5, 2016Publication date: April 6, 2017Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Phil Jae JEON, Gyeong Han CHA
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Publication number: 20160142199Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: January 27, 2016Publication date: May 19, 2016Inventors: HAN SOO LEE, SUNG JUN KIM, CHAE RYUNG KIM, DONG UK PARK, YOUN WOONG CHUNG, JUNG MYUNG CHOI, HAN KYUL LIM, GYEONG HAN CHA
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Patent number: 9281935Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: GrantFiled: October 14, 2014Date of Patent: March 8, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Soo Lee, Sung Jun Kim, Chae Ryung Kim, Dong Uk Park, Youn Woong Chung, Jung Myung Choi, Han Kyul Lim, Gyeong Han Cha
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Publication number: 20150229467Abstract: A high-speed interface apparatus and method of correcting skew in the apparatus are provided. A high-speed transmitter includes a transmission D-PHY module that generates and transmits a clock signal through a clock channel, generates a deskew synchronous code and test data in response to a deskew request signal, transmits the deskew synchronous code followed by the test data through a data channel, and transmits a normal synchronous code followed by normal data through the data channel in normal mode.Type: ApplicationFiled: October 14, 2014Publication date: August 13, 2015Inventors: HAN SOO LEE, SUNG JUN KIM, CHAE RYUNG KIM, DONG UK PARK, Youn Woong CHUNG, JUNG MYUNG CHOI, HAN KYUL LIM, GYEONG HAN CHA