Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1 or 2, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: Provided are a composition for a semiconductor process, which comprises a first component comprising an inorganic acid or an organic acid; and a second component comprising a silicon compound represented by Formula 1, and a semiconductor process, which comprises selectively cleaning and/or removing an organic substance or an inorganic substance using the composition.

Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.

Abstract: A method for fabricating a magnetic tunnel junction element includes forming a magneto resistance layer including a first magnetic layer, an insulation layer and a second magnetic layer on a substrate, forming a magnetic loss area by doping a magnetic loss impurity into a region of the magneto resistance layer to cause a magnetic loss, and etching the magnetic loss area to form a magnetic tunnel junction element.

Abstract: A method for forming an isolation structure of a flash memory device includes providing a substrate structure where a tunnel insulating layer, a conductive layer, and a padding layer are formed, etching the padding layer, the conductive layer, the tunnel insulating layer and the substrate to form a trench, forming a first insulating layer over the substrate structure and filling in a portion of the trench, forming a second insulating layer over the substrate structure, forming a third insulating layer over the substrate structure to fill the trench, polishing the first, second and third insulating layers using the padding layer as a polish stop layer, removing the padding layer and simultaneously recessing the third insulating layer to protrude the first and second insulating layers, and etching the first and second insulating layers while recessing the third insulating layer to form a protective layer on sidewalls of the conductive layer.

Abstract: A method for forming a metal pattern in a semiconductor device includes preparing a semi-finished substrate with a metal layer for use as a metal pattern, performing a cleaning process inducing oxidation over an upper surface of the metal layer to form an anti-scattering reflection layer over the upper surface of the metal layer, forming a photoresist pattern over the anti-scattering reflection layer, and etching the anti-scattering reflection layer and the metal layer exposed by the photoresist pattern to form the metal pattern.