Patents by Inventor Gyu Bum HWANG

Gyu Bum HWANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of operating memory device in test mode
    Patent number: 10937520
    Abstract: The present technology relates to an electronic device. A method of operating a memory device having improved test performance according to the present technology includes setting a plurality of program biases corresponding to a plurality of memory dies, respectively, based on an operation speed of each of the plurality of memory dies, setting a plurality of offsets corresponding to a plurality of word line groups, respectively, based on an operation speed of each of the plurality of word line groups included in a selected block of a selected memory die among the plurality of memory dies, and detecting a defect of a target block of the selected memory die using a plurality of high voltages and a set low voltage determined based on a program bias corresponding to the selected memory die and the plurality of offsets.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: March 2, 2021
    Assignee: SK hynix Inc.
    Inventors: Gyu Bum Hwang, Hee Young Kim
  • METHOD OF OPERATING MEMORY DEVICE
    Publication number: 20210005275
    Abstract: The present technology relates to an electronic device. A method of operating a memory device having improved test performance according to the present technology includes setting a plurality of program biases corresponding to a plurality of memory dies, respectively, based on an operation speed of each of the plurality of memory dies, setting a plurality of offsets corresponding to a plurality of word line groups, respectively, based on an operation speed of each of the plurality of word line groups included in a selected block of a selected memory die among the plurality of memory dies, and detecting a defect of a target block of the selected memory die using a plurality of high voltages and a set low voltage determined based on a program bias corresponding to the selected memory die and the plurality of offsets.
    Type: Application
    Filed: October 31, 2019
    Publication date: January 7, 2021
    Inventors: Gyu Bum HWANG, Hee Young KIM