Abstract: The present disclosure relates to a thermoplastic polyurethane composition for injection molding and a method for manufacturing the same. Specifically, the thermoplastic polyurethane composition includes 0.5% by weight to 10.0% by weight of a sulfonate diol, 13% by weight to 60% by weight of an isocyanate, 30% by weight to 70% by weight of an ether-containing polyester polyol, and 5% by weight to 40% by weight of a chain extender.

Abstract: Provided is a method of dicing a wafer that is thin and includes a low-K material using plasma without causing chipping and cracking during sawing without using an etch mask and without performing a separate wafer coating process. The method includes recognizing scribe lines of a front side of the wafer by using an image recognizing unit to obtain recognition information, performing two etching processes, wherein at least one includes plasma etching, on a backside of the wafer by using the recognition information to separate the wafer into a plurality of semiconductor chips, and adhering the plurality of semiconductor chips to an extended tape or a die attach film.

Abstract: Provided are a wafer through silicon via (TSV) forming method and equipment therefor. The wafer TSV forming method includes the operations of arranging a wafer having a front surface having a circuit area patterned thereon; recognizing locations of bond pads in the circuit area of the front surface of the wafer by using an image recognition camera, and converting the recognition of the locations into bond pad location information with respect to a back surface of the wafer; flipping the wafer; forming etching holes with middle depth in the back surface of the wafer by using a laser in a manner to match the locations of the bond pads by using the bond pad location information from the image recognition camera; and performing a plasma isotropic etching on the back surface having formed therein the etching holes with middle depth, thereby forming TSVs penetrating the bond pads.

Abstract: Provided are a stack-type solid-state drive (SSD) capable of reducing a size thereof by mounting semiconductor chips in a recess region formed in a substrate, and a method of fabricating the stack-type SSD. The stack-type SSD includes a substrate including one or more recess regions; one or more passive electronic elements mounted in the one or more recess regions; one or more control semiconductor chips mounted in the one or more recess regions; one or more non-volatile memory semiconductor chips mounted on a first surface of the substrate so as to overlap the one or more passive electronic elements, the one or more control semiconductor chips, or all the passive electronic elements and the control semiconductor chips; and an external connection terminal located on a side of the substrate.

Abstract: Provided is a stacking type universal serial bus (USB) memory device that can reduce the size of the stacking type USB memory device by mounting semiconductor chips in a recess region formed in a substrate and a method of fabricating the same. The stacking type USB memory device includes a substrate that includes a recess region; at least one passive electronic element mounted in the recess region; at least one control semiconductor chip mounted in the recess region; at least one semiconductor memory chip mounted on a first surface of the substrate so as to overlap the at least one passive electronic element, at least one control semiconductor chip, or both of them; and an external wire pattern formed on a second surface of the substrate facing the first surface thereof.

Abstract: Provided is a method of dicing a wafer that is thin and includes a low-K material using plasma without causing chipping and cracking during sawing without using an etch mask and without performing a separate wafer coating process. The method includes recognizing scribe lines of a front side of the wafer by using an image recognizing unit to obtain recognition information, performing two etching processes, wherein at least one includes plasma etching, on a backside of the wafer by using the recognition information to separate the wafer into a plurality of semiconductor chips, and adhering the plurality of semiconductor chips to an extended tape or a die attach film.

Abstract: Provided are a wafer through silicon via (TSV) forming method and equipment therefor. The wafer TSV forming method includes the operations of arranging a wafer having a front surface having a circuit area patterned thereon; recognizing locations of bond pads in the circuit area of the front surface of the wafer by using an image recognition camera, and converting the recognition of the locations into bond pad location information with respect to a back surface of the wafer; flipping the wafer; forming etching holes with middle depth in the back surface of the wafer by using a laser in a manner to match the locations of the bond pads by using the bond pad location information from the image recognition camera; and performing a plasma isotropic etching on the back surface having formed therein the etching holes with middle depth, thereby forming TSVs penetrating the bond pads.