Patents by Inventor Gyu Hyeong Cho

Gyu Hyeong Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7193468
    Abstract: Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: March 20, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Kee Kwon, Gyu Hyeong Cho, Mun Yang Park, Jong Dae Kim
  • Publication number: 20070030192
    Abstract: Disclosed herein are a time division sampling digital to analog converter for a flat panel display, a method of implementing the digital to analog converter, and a data driver circuit using the digital to analog converter.
    Type: Application
    Filed: March 3, 2006
    Publication date: February 8, 2007
    Inventors: Young-Suk Son, Sang-Kyung Kim, Gyu-Hyeong Cho
  • Publication number: 20060290621
    Abstract: Disclosed herein is a driving method and circuit for the automatic voltage output of an active matrix organic light emitting device, which is capable of resolving the non-uniformity of brightness between pixels.
    Type: Application
    Filed: March 3, 2006
    Publication date: December 28, 2006
    Inventors: Young-Suk Son, Sang-Kyung Kim, Gyu-Hyeong Cho
  • Publication number: 20060261998
    Abstract: Disclosed herein is a divide-add circuit and a high-resolution. Digital-to-Analog. Converter (DAC) using the same. The DAC includes a plurality of DAC units and one or more divide-add circuit units. The plurality of DAC units performs Digital-Analog (DA) conversion on two or more segmented codes, into which an input digital code is segmented. The one or more divide-add circuit units is configured to be each composed only of capacitors and switches and to generate a final DA conversion output for the entire input digital code based on the voltages of the DAC units. Accordingly, a high resolution of more than ten bits can be implemented.
    Type: Application
    Filed: April 6, 2006
    Publication date: November 23, 2006
    Inventors: Gyu-Hyeong Cho, Sang-Kyung Kim, Yong-Suk Son
  • Publication number: 20060181349
    Abstract: Provided is a complementary metal oxide semiconductor variable gain amplifier controlling a dB linear gain and a method of controlling the dB linear gain. The complimentary metal oxide semiconductor variable gain amplifier includes: first through fourth transistors differentially receiving first and second input voltages and amplifying the first and second input voltage using a predetermined gain; fifth and sixth transistors controlling a transconductance according to a control voltage to control the predetermined gain; and first and second resistors generating an output voltage having the predetermined gain according to an output current generated by the fifth and sixth transistors.
    Type: Application
    Filed: January 26, 2006
    Publication date: August 17, 2006
    Inventors: Jeongwook Koh, Hoon-tae Kim, Kyoung-sik Seol, Gyu-hyeong Cho
  • Publication number: 20060132053
    Abstract: Disclosed herein are a pixel circuit and driving method for active matrix Organic Light-emitting Diodes (OLEDs), and a display using the same. The pixel circuit includes a Voltage Control Current Source (VCCS), a high gain amplifier, a storage capacitor, and first and second switches. The VCCS is configured to drive OLEDs. The high gain amplifier is configured such that the control input signal of the VCCS causes the VCCS to be placed in an ON or OFF state. The storage capacitor is located between the input terminal of the high gain amplifier and a data line so as to assign the ON-time of the VCCS. The first and second switches are configured to be controlled through a scan line so as to store voltage in the storage capacitor and control the light-emitting time of the OLEDs, and are formed the input terminal of the high gain amplifier and the input terminal of the VCCS, respectively.
    Type: Application
    Filed: September 22, 2005
    Publication date: June 22, 2006
    Inventors: Gyu-Hyeong Cho, Young-Suk Son, Sang-Kyung Kim, Min-Chul Lee
  • Publication number: 20060061304
    Abstract: A discharge lamp driving circuit includes an inverter, a ballast capacitor, a discharge lamp, and a lamp current detecting circuit. The inverter converts a DC voltage into an AC voltage with high frequency to output the AC voltage to an output port based on a pulse width modulation control signal. The lamp current detecting circuit outputs a first voltage signal and a second voltage signal according to a voltage across the ballast capacitor to generate a lamp current sensing voltage that is proportional to a lamp current flowing through the discharge lamp. The pulse width modulation control signal has a width varying with amplitude of the lamp current so that the lamp current may be accurately detected.
    Type: Application
    Filed: September 21, 2005
    Publication date: March 23, 2006
    Inventors: Gyu-Hyeong Cho, Sang-Kyung Kim, Hee-Seok Han
  • Patent number: 6727642
    Abstract: Disclosed are flat panel field emitter displays whose unit cell structure adopt a planar cathode structure in stead of a conventional microtip structure, so as to increase the degree of integration and can be operated at low operation voltages at high speeds. In the structure, a channel insulator is formed below the cathode and underlaid by a gate. By means of the gate voltage, the electron emission from the cathode can be controlled. The electrodes in the structure are arranged in the order of anode, cathode and gate, allowing the simplification of processes. With the ease of controlling the distance between electrodes, the displays can be applied for almost all video systems from small sizes to large screen area displays, in place of conventional displays. The displays allows conventional semiconductor processes and facilities to be utilized as they are.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: April 27, 2004
    Assignee: Korea Advanced Institute of Science & Technology
    Inventors: Gyu Hyeong Cho, Nam Sung Jung, Gyun Chae, Tae Ha Ryoo, Jon Woon Hong, Seung Tak Ryu, Young Ki Kim
  • Patent number: 6437360
    Abstract: Disclosed are flat/vertical type vacuum field transistor (VFT) structures, which adopt a MOSFET-like flat or vertical structure so as to increase the degree of integration and can be operated at low operation voltages at high speeds. The flat type comprises a source and a drain, made of conductors, which stand at a predetermined distance apart on a thin channel insulator with a vacuum channel therebetween; a gate, made of a conductor, which is formed with a width below the source and the drain, the channel insulator functioning to insulate the gate from the source and the drain; and an insulating body, which serves as a base for propping up the channel insulator and the gate.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: August 20, 2002
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Gyu Hyeong Cho, Ji Yeoul Ryoo, Myeoung Wun Hwang, Min Hyung Cho, Young Jin Woo, Young Ki Kim
  • Patent number: 6396933
    Abstract: This invention provides an analog audio amplifier having both excellent linearity and high efficiency, which is combined with digital amplifier. The analog-digital combined amplifier comprises a class A, class B or class AB type analog amplifier serving as an independent voltage source; and a class D type digital amplifier serving as a dependent current source in which the analog amplifier and the digital amplifier are connected to each other.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: May 28, 2002
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Nam-Sung Jung, Gyu-Hyeong Cho
  • Publication number: 20020054575
    Abstract: In a data communications system, a first node transmits an output digital signal to a second node through a transmission line and receives an input digital signal from the second node through a reception line, a signal processing amplification block of the data communications system compensates an attenuation in the input digital signal and prevents a crosstalk between the transmission line and the reception line, and a regulating block for preventing a crosstalk receives a branch signal and generates a control signal based on a capacity of the branch signal.
    Type: Application
    Filed: October 19, 2001
    Publication date: May 9, 2002
    Inventor: Gyu Hyeong Cho
  • Patent number: 6316883
    Abstract: A power-factor correction circuit of an electronic ballast for fluorescent lamps which includes an input full-wave rectification circuit for full-wave rectifying an AC input voltage from an AC input power source, a DC-link capacitor for supplying a DC-link voltage in response to an output voltage from the rectification circuit and a resonant inverter connected in parallel to the DC-link capacitor. The power-factor correction circuit comprises a charge pumping circuit disposed between the AC input power source and the rectification circuit, a valley-fill DC voltage supply circuit disposed between the rectification circuit and the DC-link capacitor, and a high-frequency full-wave rectification circuit disposed between the DC voltage supply circuit and the DC-link capacitor and connected to a secondary winding of a power transformer in the resonant inverter.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: November 13, 2001
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Gyu Hyeong Cho, Gyun Chae
  • Patent number: 6130525
    Abstract: A hybrid regulator in which a switching regulator and a series regulator are inter-connected in a desired manner. In the hybrid regulator, most of current required for a load is supplied from the switching regulator which has a poor regulation performance while having high efficiency. The hybrid regulator also includes a sensing unit for the rapid sensing of the current supplied to the load. Based on the operation of the sensing unit, the series regulator, which has a poor power efficiency while exhibiting a excellent regulation performance, supplies or absorbs only a small amount of ripple current. The series regulator serves as an independent voltage source whereas the switching regulator serves as a dependent current source. Accordingly, the hybrid regulator ensures a superior regulation performance while achieving high efficiency.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: October 10, 2000
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Nam-Sung Jung, Gyu-Hyeong Cho
  • Patent number: 4740881
    Abstract: A simultaneous recovery commutation current source inverter is provided by connecting three AC output terminals of a main inverter and an auxiliary inverter in parallel with each other and to three terminals of an induction motor, providing a high AC impedance DC current source through inductors connected in series to a variable DC electric source so that DC electric power is supplied to both sides of a main DC bus of the main inverter, providing a low AC impedance DC voltage source by supplying DC electric power to both sides of an auxiliary DC bus of the auxiliary inverter through a rectifying circuit from the respective connecting points of the main inverter, auxiliary inverter and the three motor terminals. Snubber circuits may be added to the respective semiconductor elements for safe switching operation.
    Type: Grant
    Filed: January 7, 1987
    Date of Patent: April 26, 1988
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sun-Soon Park, Gyu-Hyeong Cho
  • Patent number: 4642747
    Abstract: Fault-protection is added to static AC-to-AC converter to protect the GTO devices bilaterally by adding at least two line bridges of diodes having an inductor thereacross. Fault-protection is extended to a UFC system by incorporating such inductor in the diode bridges of the GTO devices forming the bilateral switches of the UFC system. The dissipating energy is minimized by combining such fault-protection bridges. The inductors may be coupled controlled demagnetization of the inductors is provided.
    Type: Grant
    Filed: May 22, 1985
    Date of Patent: February 10, 1987
    Assignee: Westinghouse Electric Corp.
    Inventor: Gyu-Hyeong Cho
  • Patent number: 4581696
    Abstract: In a pulse-width modulated unrestricted frequency changer (UFC) the harmonic contents of the input current are minimized by splitting the active time intervals within the fundamental time frame into at least two pulses which are located within such time frame and controlled in width as if individual PWM single-pulse UFC's were controlled having a phase shift between each other so as to eliminate or reduce undesired frequency components. Such elimination or minimization of selected frequency components is used to reduce the size of the lowpass filter at the input of the UFC, namely by allowing a higher cut-off resonance limit.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: April 8, 1986
    Assignee: Westinghouse Electric Corp.
    Inventors: Laszlo Gyugyi, Theodore M. Heinrich, Gyu-Hyeong Cho
  • Patent number: 4578746
    Abstract: In a static frequency changer controlled by adjusting the time of conduction of the bilateral switching units forming static converters, the time of conduction is split into n time intervals of respective subdurations adding up to be equivalent to the effective time of conduction of the controlled switching unit, and such subdurations are spread and distributed throughout the time period of control of the switching unit both within the original switching pattern of each converter and between the effective times of conduction of the respective converters, thereby to minimize harmonic distortion of the input supply current of the frequency changer.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: March 25, 1986
    Assignee: Westinghouse Electric Corp.
    Inventors: Laszlo Gyugyi, Theodore M. Heinrich, Gyu-Hyeong Cho