Abstract: A signal generation circuit includes a first delay circuit, a second delay circuit, and a duty control circuit. The first delay circuit delays a first input signal to generate a first output signal. The second delay circuit delays a second input signal to generate a second output signal. The duty control circuit compares phases of the first and second output signals and changes the value of the second delay control signal, and then decreases the times, by which the first and second input signals are delayed, by the same value.

Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.

Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.

Abstract: A method of inspecting the quality of an organic light-emitting diode (OLED) and an inspecting system for performing the method are disclosed. In one aspect, the method includes applying an input voltage to the OLED, measuring an OLED voltage across the OLED and an OLED current flowing through the OLED, estimating a parameter of the OLED based at least in part on the OLED voltage and the OLED current, and extracting a physical characteristic of the OLED based at least in part on the parameter.

Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.

Abstract: This patent is provided a method for producing a porous polymer film using vanadium oxide nanowires, and a porous polymer film obtained from the method. The method allows control of a uniform pore size and density through a simple process including the steps of: adding an ion exchanger to deionized water to perform acidification and adding a vanadate compound thereto to grow vanadium oxide nanowires by a sol-gel process; mixing the resultant solution of grown nanowires with a polymer solution to provide a mixed solution of nanowires; pouring the mixed solution of nanowires to a mold, followed by drying and curing, to form a film; and etching the resultant film with an etching solution to remove the vanadium oxide nanowires.

Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.

Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.

Abstract: A method of inspecting the quality of an organic light-emitting diode (OLED) and an inspecting system for performing the method are disclosed. In one aspect, the method includes applying an input voltage to the OLED, measuring an OLED voltage across the OLED and an OLED current flowing through the OLED, estimating a parameter of the OLED based at least in part on the OLED voltage and the OLED current, and extracting a physical characteristic of the OLED based at least in part on the parameter.

Abstract: This patent is provided a method for producing a porous polymer film using vanadium oxide nanowires, and a porous polymer film obtained from the method. The method allows control of a uniform pore size and density through a simple process including the steps of: adding an ion exchanger to deionized water to perform acidification and adding a vanadate compound thereto to grow vanadium oxide nanowires by a sol-gel process; mixing the resultant solution of grown nanowires with a polymer solution to provide a mixed solution of nanowires; pouring the mixed solution of nanowires to a mold, followed by drying and curing, to form a film; and etching the resultant film with an etching solution to remove the vanadium oxide nanowires.

Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.

Abstract: Provided are an electronic device, a memory device, and a method of fabricating the devices for preventing physical distortion of functional elements from generating and improving electric contact properties between the functional elements and electric elements connecting to the functional elements. At least two grooves are formed in a substrate, and a conductive material is filled in the grooves to obtain electric elements having a surface at the same height as that of the substrate. In addition, a functional material layer (functional layer) is formed on an entire upper surface of the substrate and is patterned so as to obtain a functional element having both bottom surfaces contacting the electric elements.

Abstract: A display substrate includes a base substrate, a first line, a second line, a bridge line, a thin-film transistor (TFT), a storage line, and a pixel electrode. The first line extends in a first direction on the base substrate. The second line extends in a second direction on the base substrate and is divided into two portions with respect to the first line. The bridge line makes contact with the two portions of the second line in first and second bridge contact regions. The TFT includes a source electrode making contact with one of the first and second lines in a data contact region. The storage line is formed on the one of the first and second lines. The pixel electrode is formed on the storage line and is electrically connected to the TFT. The display substrate reduces formation of parasitic capacitance between pixel electrode and data line.

Abstract: A lift type pore-controllable fiber filter includes a filter tank, a strainer coaxially formed as a porous tub in the filter tank, extending to an outside of the filter tank at a bottom thereof to communicate with a treated water drain pipe, and having a piston guide recessed in an axial direction at an upper portion thereof, a lifting driver including a cylinder and a piston, an upper filter material fixing plate having fixing means, fixed to the piston above the strainer, and working in collaboration with reciprocation of the piston, a lower filter material fixing plate having fixing means and fixed below the strainer, and at least one fiber filter material fixed to the fixing means of the upper and lower filter material fixing plates at upper and lower ends thereof respectively, and forming filtering pore layers on an outer circumference of the strainer.

Abstract: Provided is a vertical electrode structure using a trench and a method of manufacturing the vertical electrode structure. The method of forming a vertical electrode structure using a trench includes steps of: forming the trench on a predetermined region of a semiconductor substrate; and forming electrode layers in predetermined regions of inner and outer portions of the trench. In this manner, the electrode deposition in the vertical direction is established by using the trench, so that it is possible to form a deposited electrode having a size of several hundred nm or less by a short processing time and a low processing cost.

Abstract: A display substrate that has increased aperture ratio is presented. The display substrate includes a base substrate, a first metal pattern formed on the base substrate and a gate wiring and a gate electrode. A first insulating layer is formed on the base substrate covering the first metal pattern. A second metal pattern is formed on the first insulating layer including a data wiring crossing the gate wiring, a source electrode connected to the data wiring and a drain electrode separated from the source electrode. A second insulating layer is formed on the base substrate covering the second metal pattern. A transparent electrode is formed on the second insulating layer. An organic layer is formed on the transparent electrode, and a pixel electrode is formed on the organic layer being insulated with the transparent electrode, and contacted to the drain electrode. The organic layer may comprise red, green and blue color filters.

Abstract: A gate driving circuit includes cascaded stages, each including a pull-up part, a carry part, a pull-up driving part, a holding part and an inverter. The pull-up part pulls up a gate voltage to an input clock. The carry part pulls up a carry voltage to the input clock. The pull-up driving part is connected to a control terminal (Q-node) common to the carry part and the pull-up part, and receives a previous carry voltage from a previous stage to turn on the pull-up part and the carry part. The holding part holds the gate voltage at an off-voltage, and the inverter controls at least one of turning on the holding part and turning off the holding part based on an inverter clock. A high level of the inverter clock in a given horizontal period (1H) temporally precedes a high level of the input clock by a predetermined time interval.

Abstract: A method of fabricating an electronic device using nanowires, minimizing the number of E-beam processing steps and thus improving a yield, includes the steps of: forming electrodes on a substrate; depositing a plurality of nanowires on the substrate including the electrodes; capturing an image of the substrate including the nanowires and the electrodes; drawing virtual connection lines for connecting the nanowires with the electrodes on the image using an electrode pattern simulated through a computer program, after capturing the image; coating an E-beam photoresist on the substrate; removing the photoresist from regions corresponding to the virtual connection lines and the electrode pattern using E-beam lithography; depositing a metal layer on the substrate after removing the photoresist from the regions of the virtual connection lines; and removing remaining photoresist from the substrate using a lift-off process.

Abstract: Provided are an electronic device, a memory device, and a method of fabricating the devices for preventing physical distortion of functional elements from generating and improving electric contact properties between the functional elements and electric elements connecting to the functional elements. At least two grooves are formed in a substrate, and a conductive material is filled in the grooves to obtain electric elements having a surface at the same height as that of the substrate. In addition, a functional material layer (functional layer) is formed on an entire upper surface of the substrate and is patterned so as to obtain a functional element having both bottom surfaces contacting the electric elements.

Abstract: A lift type pore-controllable fiber filter includes a filter tank, a strainer coaxially formed as a porous tub in the filter tank, extending to an outside of the filter tank at a bottom thereof to communicate with a treated water drain pipe, and having a piston guide recessed in an axial direction at an upper portion thereof, a lifting driver including a cylinder and a piston, an upper filter material fixing plate having fixing means, fixed to the piston above the strainer, and working in collaboration with reciprocation of the piston, a lower filter material fixing plate having fixing means and fixed below the strainer, and at least one fiber filter material fixed to the fixing means of the upper and lower filter material fixing plates at upper and lower ends thereof respectively, and forming filtering pore layers on an outer circumference of the strainer.