Patents by Inventor Gyung-Han Lee

Gyung-Han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low-voltage non-volatile semiconductor memory device
    Patent number: 6888756
    Abstract: The disclosure is a non-volatile semiconductor memory device including a bias circuit that generates a bias voltage for controlling an NMOS transistor connected to both a bit line and a page buffer circuit. The bias circuit generates a first voltage, which is greater than a power source voltage, as the bias signal in a precharge period of a read operation. The bias circuit also generates a second voltage, which is less than the power source voltage, as the bias signal in a sensing period of the read operation.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: May 3, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Seok Byeon, June Lee, Gyung-Han Lee
  • Low-voltage non-volatile semiconductor memory device
    Publication number: 20030174539
    Abstract: The disclosure is a non-volatile semiconductor memory device including a bias circuit that generates a bias voltage for controlling an NMOS transistor connected to both a bit line and a page buffer circuit. The bias circuit generates a first voltage, which is greater than a power source voltage, as the bias signal in a precharge period of a read operation. The bias circuit also generates a second voltage, which is less than the power source voltage, as the bias signal in a sensing period of the read operation.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 18, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae-Seok Byeon, June Lee, Gyung-Han Lee