Abstract: A pouch film laminate according to the present disclosure may include a base material layer, a gas barrier layer, and a sealant layer. The gas barrier layer may be disposed between the base material layer and the sealant layer. The gas barrier layer may include stainless steel. The pouch film laminate may have a tensile rupture strength of about 130% to about 250% of a tensile rupture strength of the gas barrier layer.

Abstract: The present disclosure relates to a secondary battery including an electrode assembly to which an electrode lead is attached; a case accommodating the electrode assembly and defining a sealing portion to seal the electrode assembly in the case; and a lead film surrounding a portion of an outer surface of the electrode lead and interposed between the electrode lead and the sealing portion. The lead film includes a first region configured to be primarily broken during swelling of the battery and a second region configured to be secondarily broken during swelling of the battery.

Abstract: The present invention relates to a method and an apparatus for diagnosing low voltage of a secondary battery cell. The method for diagnosing low voltage of a secondary battery cell according to an embodiment of the present invention includes pre-aging a battery cell, charging the battery cell according to a preset charging condition, measuring a parameter for determining low voltage failure of the battery cell, comparing the measured parameter with a reference parameter, and performing formation when the battery cell is determined to be normal.

Abstract: The present invention relates to a battery cell including a pouch-shaped battery case configured to receive an electrode assembly therein. The pouch-shaped battery case is provided at an outer periphery thereof surrounding an electrode assembly receiving portion with a sealed portion, and an embossed pattern is formed on the sealed portion in all directions. Thus, it is possible to increase sealing force of a pouch-shaped battery cell without the addition of a separate battery cell manufacturing process.

Abstract: A secondary battery comprises an electrode assembly, a can, and an insulator. The electrode assembly includes a first electrode, a separator, and a second electrode alternately stacked and wound. The can has an accommodation part accommodating the electrode assembly therein, and the can comprises a first can and a second can having cylindrical shapes open in a direction facing each other. The insulator insulates an overlapping portion between the first can and the second can. The first can is electrically connected to the first electrode, and the second can is electrically connected to the second electrode. The insulator has a short-circuit induction through-part defined by a through-hole or a cutoff line, such that a short circuit occurs between the first can and the second can through the short-circuit induction through-part when it is deformed in shape as heat or a pressure is applied to contract or expand the insulator.

Abstract: Provided are a central processing unit (CPU) and method for executing a branch instruction of a CPU, which can protect user's data by preventing an error due to a computer virus and a hacker is provided. The CPU includes: a branch instruction verification unit which verifies whether a branch instruction is valid; and a branch instruction execution unit which executes the branch instruction when the branch instruction is valid. The method includes: verifying whether the branch instruction is valid; and not executing the branch instruction when the branch instruction is invalid.

Abstract: Provided are a central processing unit (CPU) and method for executing a branch instruction of a CPU, which can protect user's data by preventing an error due to a computer virus and a hacker is provided. The CPU includes: a branch instruction verification unit which verifies whether a branch instruction is valid; and a branch instruction execution unit which executes the branch instruction when the branch instruction is valid. The method includes: verifying whether the branch instruction is valid; and not executing the branch instruction when the branch instruction is invalid.

Abstract: A data processing apparatus having a memory access architecture which utilizes distributed shared-memory multiprocessors, and relates more particularly to a non-inclusive memory access mechanism in said architecture. The local memory in each node of shared memory is utilized as a backing store for blocks discarded from the processor cache to delay the address binding to the local memory until the blocks are discarded from the processor cache. Such avoids enforcement of the inclusion property and long latency due to the inclusion property. The invention further provides a method of maintaining coherency in a system which utilizes a distributed shared-memory multiprocessors architecture.

Abstract: The present invention relates to a method for reducing overheads of cache coherence enforcement in a shared-bus multiprocessors apparatus by utilizing a self-invalidation technique at local processor nodes as an extension to write-invalidate protocols in the shared-bus environment, and to an apparatus therefor.