Abstract: A frequency synthesizer has a phase locked loop, a .DELTA..SIGMA. modulator, and a filter. The phase locked loop includes a frequency divider that controls the frequency of the phase locked loop output signal. The output of the .DELTA..SIGMA. modulator is fed through the filter and the output of the filter is used to control a division factor in the frequency divider. Compensation may be performed at the input to the .DELTA..SIGMA. modulator in order to compensate for the filtering performed between the .DELTA..SIGMA. modulator and the frequency divider. The filter may be used to reduce quantization noise in an input to the frequency divider, and thereby reduces phase noise in an output of the phase locked loop.

Abstract: A .DELTA..SIGMA. controlled phase locked loop modulation is used with limited oversampling factors while fulfilling the spectrum and/or phase noise requirements on the modulation in the phase locked loop. By filtering the quantization noise sufficiently then compensating for the distortion of the modulation at the input of the .DELTA..SIGMA. modulator, the required oversampling factor of the .DELTA..SIGMA. controlled phase locked loop modulators can be reduced without loss of performance. The distortion is mitigated by performing a compensation at the input to the .DELTA..SIGMA. modulator. The noise reduction obtained by lowering the bandwidth of the phase locked loop can then be traded to reduce the oversampling factor.