Abstract: A method is provided for combining the process steps for forming a resistor and interconnect into one process layer, thus eliminating the need for at least two mask steps. An oxide layer is formed over a region of a polysilicon layer in which the resistor will be formed. The oxide protects the resistor from further processing. A conductive layer is then deposited at least over the exposed portion of the polysilicon layer. In a first preferred embodiment, a refractory metal forms the conductive layer. The refractory metal is sintered or heated to form silicide over the exposed portion of the polysilicon layer, and the non-silicided metal is removed. The underlying layer may be doped as desired, before or after silicidation, for the first preferred embodiment. Thus, a resistor and conductive interconnect is formed within the same layer. Also disclosed is an embodiment in which the conductive layer need not be sintered, and an embodiment in which the resistor is formed in the sidewalls of a vertical cavity.

Abstract: A method is disclosed for providing a self-aligned silicide strap for connecting thin polysilicon layers (poly-1 and poly-2, etc.) separated by non-conducting gaps. A butting contact opening to the layers is formed in an overlying insulating layer. The contact exposes the poly-1 and poly-2 layers. A thin polysilicon layer (poly-3) is then deposited over the insulating layer and into the contact. This is followed by deposition of a refractory metal layer. The poly-3 layer should be thin enough that, alone, it cannot supply enough silicon to support full silicidation of the refractory metal layer. The structure is next sintered so that a silicide strap is formed in the contact opening and across exposed portions of the poly-1 and poly-2 layers. The ratio of silicon to titanium in regions over the insulating layer is lower than that in the strap, such that these more metallic regions may be selectively removed.

Abstract: A method is provided for combining the process steps for forming a resistor and interconnect into one process layer, thus eliminating the need for at least two mask steps. An oxide layer is formed over a region of a polysilicon layer in which the resistor will be formed. The oxide protects the resistor from further processing. A conductive layer is then deposited at least over the exposed portion of the polysilicon layer. In a first preferred embodiment, a refractory metal forms the conductive layer. The refractory metal is sintered or heated to form silicide over the exposed portion of the polysilicon layer, and the non-silicided metal is removed. The underlying layer may be doped as desired, before or after silicidation, for the first preferred embodiment. Thus, a resistor and conductive interconnect is formed within the same layer. Also disclosed is an embodiment in which the conductive layer need not be sintered, and an embodiment in which the resistor is formed in the sidewalls of a vertical cavity.

Abstract: A method is disclosed for providing a self-aligned silicide strap for connecting thin polysilicon layers (poly-1 and poly-2, etc.) separated by non-conducting gaps. A butting contact opening to the layers is formed in an overlying insulating layer. The contact exposes the poly-1 and poly-2 layers. A thin polysilicon layer (poly-3) is then deposited over the insulating layer and into the contact. This is followed by deposition of a refractory metal layer. The poly-3 layer should be thin enough that, alone, it cannot supply enough silicon to support full silicidation of the refractory metal layer. The structure is next sintered so that a silicide strap is formed in the contact opening and across exposed portions of the poly-1 and poly-2 layers. The ratio of silicon to titanium in regions over the insulating layer is lower than that in the strap, such that these more metallic regions may be selectively removed.