Abstract: A maximize efficiency method for resonant converter with self-adjusting switching points is disclosed. The method is operated by a resonant converter, which comprises a transformer and a field effect transistor (FET). When the transistor is turned on, energy is stored in the transformer. When the transistor is turned off, a resonant signal is generated at a drain of the transistor. At this time, a suitable trigger time has to be found to turn on the transistor, so as to reduce switching power loss. The method measures the slope of the resonant signal at the trigger time. This is used as a reference to adjust the next cycle's trigger time. If the slope is negative at the time of trigger, a delta time is added to the trigger time in the next cycle, If the slope is positive, a delta time is subtracted from the trigger time for the next cycle.

Abstract: A method of power factor correction without using current sensing or a multiplier is disclosed. A generated predictive pulse is used to charge and discharge a power factor correction (PFC) inductor so that the current in the PFC inductor has a similar phase angle as the input AC voltage. Each ON portion of the pulse is used for charging while each OFF portion is used for discharging. As the input voltage increases in phase, the predictive pulse gradually increases in ON time duty and the PFC inductor is charged in increasing amount and discharged in decreasing amount per pulse. When peak is reached the duty ratio is reduced each pulse and the PFC inductor current is reduced along with the input AC voltage source until phase angle reaches 180 degrees and the ON time becomes zero.

Abstract: A method of controlling a switch in a power converter in order to reduce switching power loss is disclosed. A trigger voltage level is set and the voltage level across the switch VDS is measured. If the voltage level of VDS is lower than the trigger voltage level the slope of VDS is determined. If the slope is less than zero the switch is turned on and the trigger voltage is lowered. If the slope is zero the switch is turned on and the trigger voltage stays the same. A timer is used to ensure the slope will approach zero. If the slope is positive the switch is turned on, the trigger voltage is raised, and the timer is told to turn on earlier. By repeated adjusting the trigger voltage level the slope approaches zero and maximum power loss reduction is achieved.

Abstract: A method of power factor correction without using current sensing or a multiplier is disclosed. A generated predictive pulse is used to charge and discharge a PFC inductor in such a way that the current in the PFC inductor has a similar phase angle as the input AC voltage. Each ON portion of the pulse is used for charging while each OFF portion is used for discharging. As the input voltage increases in phase, the predictive pulse gradually increases in ON time duty and the PFC inductor is charged in increasing amount and discharged in decreasing amount per pulse. When peak is reached the duty ratio is reduced each pulse and the PFC inductor current is reduced along with the input AC voltage source until phase angle reaches 180 degrees and the ON time becomes zero.

Abstract: A PWM controller that effectively transitions between normal mode and green power mode is disclosed. A driver provides a normal drive signal during normal operation. A pulse width detector detects the pulse width of the PWM signal and if the pulse width drops below a threshold the normal mode drive signal will be turned off and a pulse ON time measurer will begin storing the pulse ON time. When the total ON time reaches a total ON time threshold or the output voltage drops below a voltage limit, a green mode drive signal will be output to the power converter. During green mode the driver will continue sending the green mode drive signal at intervals until a heavy load condition when the green mode drive signal will be shut off and the driver will resume sending the normal mode drive signal.

Abstract: A method of power factor correction is disclosed. The method uses the slope of the voltage waveform to determine the phase angle of the voltage. Based on the phase angle, a current waveform is generated that is in phase with the voltage. The slope of the voltage signal is calculated as the derivative of voltage with respect to time. The resultant current signal is in ratio with the voltage signal. Additionally, the current signal has zero or near zero phase displacement with respect to the voltage signal. Repeatedly performing the steps of the method allows a continuous current signal to be provided. As load characteristics change, the method quickly adapts the power to compensate. As a result, reliable and effective power factor correction is achieved.

Abstract: Circuits and methods are provided for operating a transistor as rectifier based upon the detected Vds of the transistor. In sensing the Vds voltage of the SRMOS, during positive conduction, the SRMOS body diode will conduct and the Vds of the SRMOS becomes that of a forward body diode voltage, which may, depending on the type of the device, be approximately -0.6V. If this voltage level is sensed, it may indicates that the SRMOS is turned off too early. During reverse conduction, Vds is non-existent (which is similar to a diode). In this case, the SRMOS may be turned off too late. Thus, by examining Vds, the SRMOS can be operated in such a manner so that it is turned off at an optimal point in time.

Abstract: A rectifying device comprising of a SRMOS, an inductor, and a control circuit is disclosed. The SRMOS has a gate, a drain, and a source. The gate of the SRMOS is connected to the output of the control circuit. The inductor is connected to the drain of the SRMOS. The control circuit uses two sense traces for determining the voltage (or current) passing between the inductor (that is connected to the drain) and the source of the SRMOS. Upon sensing a forward characteristic (voltage or current), the SRMOS forward biases to allow current to flow through the SRMOS. Upon sensing a reverse characteristic (voltage or current), the SRMOS reverse biases to cut off any current flow. Hysteresis is used in setting the forward biasing threshold voltage and the reverse biasing threshold voltage for the SRMOS. In reverse biasing and forward biasing the SRMOS, V.sub.gs is stepped (or curved) controlled to avoid false turn ON/OFF of the SRMOS.