Abstract: An addressing structure uses an ionizable gas to address data storage elements (16) defined by the overlapping areas of multiple column electrodes (18) on a first substrate (48) and multiple channels (20) on a second substrate (54). A layer of dielectric material (46) separates the first and second substrates. Each of the channels is filled with the ionizable gas and includes a reference potential electrode that receives a data drive signal and a row electrode that receives a data strobe signal. For each storage element, the ionizable gas functions as an electrical switch that changes between a conducting or plasma state and a nonconducting or de-ionized state in response to an applied data strobe signal. The ionizable gas functions to either store data in or read data out of the storage element.

Abstract: An electromagnetic deflection circuit is disclosed. The deflection circuit includes a plurality of loss elements. These loss elements are responsible for the production of an inherent time delay between the energization of the circuit by an input signal and the generation of a magnetic flux used to deflect an electron beam within a cathode-ray tube. According to an exemplified embodiment of the invention, a DC level shift signal generator, a beam position input signal generator, and an adder for adding the DC level shift signal to the beam position input signal produce an input signal that energizes the correction deflection circuit. The introduction of the DC level to the beam position input signal effectively advances, in time, the output signal from the convergence correction signal generator. This advance compensates for the various time delays present in the deflection circuit.

Abstract: This invention is designed to protect a resonant scan deflection transistor in a deflection circuit from extremely high flyback voltage pulses. The deflection transistor is protected against high flyback voltage pulses even though: the B+ voltage on the deflection circuit varies over a wide range, the rate of the base drive signal varies over a wide range, and the turn-off delay time of the deflection transistor varies from device to device and for any one device as the base drive signal rate changes. The circuit of this invention compensates for the variations in turn-off delay time (t.sub.D) of the deflection transistor at different horizontal scanning rates, and, in response to this compensation, compares the B+ voltage level with the current in the deflection coil. An extra turn-off trigger signal is developed in response thereto for energizing the deflection transistor drive circuit. In response to the trigger signal, the deflection transistor turns off.