Abstract: An image sensor may include a substrate including first and second surfaces opposite each other, a plurality of photoelectric conversion devices isolated from direct contact with each other within the substrate, a first trench configured to extend into an interior of the substrate from the first surface of the substrate and between adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices, a first supporter within the first trench, and a first isolation layer at least partially covering both sidewalls of the first supporter within the first trench, wherein a lower surface of the first supporter is coplanar with the first surface of the substrate.

Abstract: An image sensor includes a substrate including a plurality of unit pixels, a stack structure on the substrate, and a grid pattern between ones of the plurality of unit pixels on the stack structure. The grid pattern includes a lower grid pattern and an upper grid pattern on the lower grid pattern, the lower grid pattern including lanthanum oxide (LaO), amorphous silicon (a-Si), or polysilicon (poly-Si) and the upper grid pattern including a conductive material.

Abstract: An image sensor includes a photoelectric converter in a pixel area of a substrate to generate photoelectrons in response to an incident light that is incident onto the pixel area, a signal generator on a first surface of the substrate in the pixel area to generate electric signals corresponding to image information of an object in accordance with the photoelectrons, and a pixel separation pattern penetrating through the substrate from the first surface of the substrate to a second surface of the substrate opposite to the first surface of the substrate, the pixel separation pattern including an insulation pattern having a refractive index smaller than that of the substrate and a metallic conductive pattern enclosed by the insulation pattern, and the pixel area being enclosed by the pixel separation pattern and isolated from a neighboring pixel area.

Abstract: Image sensors with improved performance and a higher degree of integration are provided. The image sensors include a substrate including a first surface and a second surface opposite to each other, a first organic photoelectric conversion layer on the first surface of the substrate, a first penetration via connected to the first organic photoelectric conversion layer and extending through the substrate, a first floating diffusion region in the substrate adjacent to the second surface of the substrate, and a first transistor structure on the second surface of the substrate, wherein the first transistor structure includes a semiconductor layer configured to connect the first penetration via and the first floating diffusion region, a gate electrode on the semiconductor layer, and a gate dielectric film between the semiconductor layer and the gate electrode.

Abstract: Image sensors with improved performance and a higher degree of integration are provided. The image sensors include a substrate including a first surface and a second surface opposite to each other, a first organic photoelectric conversion layer on the first surface of the substrate, a first penetration via connected to the first organic photoelectric conversion layer and extending through the substrate, a first floating diffusion region in the substrate adjacent to the second surface of the substrate, and a first transistor structure on the second surface of the substrate, wherein the first transistor structure includes a semiconductor layer configured to connect the first penetration via and the first floating diffusion region, a gate electrode on the semiconductor layer, and a gate dielectric film between the semiconductor layer and the gate electrode.

Abstract: An image sensor may include a substrate including first and second surfaces opposite each other, a plurality of photoelectric conversion devices isolated from direct contact with each other within the substrate, a first trench configured to extend into an interior of the substrate from the first surface of the substrate and between adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices, a first supporter within the first trench, and a first isolation layer at least partially covering both sidewalls of the first supporter within the first trench, wherein a lower surface of the first supporter is coplanar with the first surface of the substrate.

Abstract: An image sensor includes a photoelectric converter in a pixel area of a substrate to generate photoelectrons in response to an incident light that is incident onto the pixel area, a signal generator on a first surface of the substrate in the pixel area to generate electric signals corresponding to image information of an object in accordance with the photoelectrons, and a pixel separation pattern penetrating through the substrate from the first surface of the substrate to a second surface of the substrate opposite to the first surface of the substrate, the pixel separation pattern including an insulation pattern having a refractive index smaller than that of the substrate and a metallic conductive pattern enclosed by the insulation pattern, and the pixel area being enclosed by the pixel separation pattern and isolated from a neighboring pixel area.

Abstract: An image sensor includes a substrate including a plurality of unit pixels, a stack structure on the substrate, and a grid pattern between ones of the plurality of unit pixels on the stack structure. The grid pattern includes a lower grid pattern and an upper grid pattern on the lower grid pattern, the lower grid pattern including lanthanum oxide (LaO), amorphous silicon (a-Si), or polysilicon (poly-Si) and the upper grid pattern including a conductive material.

Abstract: An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.

Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.

Abstract: An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.

Abstract: An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.

Abstract: Methods of manufacturing a semiconductor device are provided. The methods may include forming a fin-type active region protruding from a substrate and forming a gate insulating film covering a top surface and both sidewalls of the fin-type active region. The gate insulating film may include a high-k dielectric film. The methods may also include forming a metal-containing layer on the gate insulating film, forming a silicon capping layer containing hydrogen atoms on the metal-containing layer, removing a portion of the hydrogen atoms contained in the silicon capping layer, removing the silicon capping layer and at least a portion of the metal-containing layer, and forming a gate electrode on the gate insulating film. The gate electrode may cover the top surface and the both sidewalls of the fin-type active region.

Abstract: An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.

Abstract: Methods of manufacturing a semiconductor device are provided. The methods may include forming a fin-type active region protruding from a substrate and forming a gate insulating film covering a top surface and both sidewalls of the fin-type active region. The gate insulating film may include a high-k dielectric film. The methods may also include forming a metal-containing layer on the gate insulating film, forming a silicon capping layer containing hydrogen atoms on the metal-containing layer, removing a portion of the hydrogen atoms contained in the silicon capping layer, removing the silicon capping layer and at least a portion of the metal-containing layer, and forming a gate electrode on the gate insulating film. The gate electrode may cover the top surface and the both sidewalls of the fin-type active region.

Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.

Abstract: A semiconductor device includes a semiconductor substrate including a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate 5 structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.

Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.

Abstract: A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.

Abstract: Provided are a method of forming a dielectric and a method of fabricating a semiconductor device. The method includes forming a preliminary dielectric including Hf, O and an “A” element on an underlying layer. The preliminary dielectric is formed in an amorphous structure or a mixed structure of an amorphous structure and an “M” crystalline structure. The “A” element about 1 at % to about 5 at % of the total content of the “A” element and Hf in the preliminary dielectric. Through a nitridation process, nitrogen is added to the preliminary dielectric. The nitrogen-containing dielectric is changed into a dielectric having a “T” crystalline structure through a phase transition process, wherein the “T” crystalline structure is different from the “M” crystalline structure. An upper layer is formed on the “T” crystalline dielectric.