Abstract: A display device includes a gate electrode on a substrate of a semiconductor device, a gate insulating film over the gate electrode, an active layer comprising an oxide including indium, zinc and gallium on the gate insulating film, and overlapping the gate electrode, and a source electrode and a drain electrode that are spaced apart from each other, wherein the active layer is formed from a zinc-rich target material, and an atomic % ratio of indium, zinc and gallium in the active layer is different from an atomic % ratio of the zinc-rich target material.

Abstract: A display device includes a gate electrode on a substrate of a semiconductor device, a gate insulating film over the gate electrode, an active layer comprising an oxide including indium, zinc and gallium on the gate insulating film, and overlapping the gate electrode, and a source electrode and a drain electrode that are spaced apart from each other, wherein the active layer is formed from a zinc-rich target material, and an atomic % ratio of indium, zinc and gallium in the active layer is different from an atomic % ratio of the zinc-rich target material.

Abstract: A method for manufacturing a semiconductor device is discussed. The method includes forming a gate electrode on a substrate, forming a gate insulating film over the substrate, depositing an In—Ga—Zn oxide over the gate insulating film while heating the substrate to a temperature of 200 to 300° C., an atomic percent ratio of Zn in the In—Ga—Zn oxide as-deposited being higher than that of In or Ga, heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an active layer crystallized throughout an entire thickness of the active layer, and forming a source electrode and a drain electrode.

Abstract: A method for manufacturing a semiconductor device is discussed. The method includes forming a gate electrode on a substrate, forming a gate insulating film over the substrate, depositing an In—Ga—Zn oxide over the gate insulating film while heating the substrate to a temperature of 200 to 300° C., an atomic percent ratio of Zn in the In—Ga—Zn oxide as-deposited being higher than that of In or Ga, heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an active layer crystallized throughout an entire thickness of the active layer, and forming a source electrode and a drain electrode.

Abstract: An oxide semiconductor crystallization method may include depositing an In—Ga—Zn oxide over the substrate while heating a substrate to a temperature of 200 to 300° C., and heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an oxide semiconductor layer crystallized throughout an entire thickness thereof.

Abstract: An oxide semiconductor crystallization method may include depositing an In—Ga—Zn oxide over the substrate while heating a substrate to a temperature of 200 to 300° C., and heat-treating the deposited In—Ga—Zn oxide at a temperature of 200 to 350° C., thereby forming an oxide semiconductor layer crystallized throughout an entire thickness thereof.

Abstract: A method for manufacturing a thin film transistor (TFT) array substrate having enhanced reliability is disclosed. The method includes forming a multilayer structure including at least one first metal layer and a second metal layer made of copper, forming a first mask layer including a first mask area corresponding to a data line and a second mask area corresponding to an electrode pattern to overlap with an active layer, patterning the multilayer structure, thereby forming the data line constituted by the multilayer structure, patterning the second metal layer, thereby forming the electrode pattern constituted by the at least one first metal layer, forming a second mask layer to expose a portion of the electrode pattern corresponding to a channel area of the active layer, patterning the at least one first metal layer, thereby forming source and drain.

Abstract: A method for manufacturing a thin film transistor (TFT) array substrate having enhanced reliability is disclosed. The method includes forming a multilayer structure including at least one first metal layer and a second metal layer made of copper, forming a first mask layer including a first mask area corresponding to a data line and a second mask area corresponding to an electrode pattern to overlap with an active layer, patterning the multilayer structure, thereby forming the data line constituted by the multilayer structure, patterning the second metal layer, thereby forming the electrode pattern constituted by the at least one first metal layer, forming a second mask layer to expose a portion of the electrode pattern corresponding to a channel area of the active layer, patterning the at least one first metal layer, thereby forming source and drain.

Abstract: Disclosed is a method for speech speaker recognition of a speech speaker recognition apparatus, the method including detecting effective speech data from input speech; extracting an acoustic feature from the speech data; generating an acoustic feature transformation matrix from the speech data according to each of Principal Component Analysis (PCA) and Linear Discriminant Analysis (LDA), mixing each of the acoustic feature transformation matrixes to construct a hybrid acoustic feature transformation matrix, and multiplying the matrix representing the acoustic feature with the hybrid acoustic feature transformation matrix to generate a final feature vector; and generating a speaker model from the final feature vector, comparing a pre-stored universal speaker model with the generated speaker model to identify the speaker, and verifying the identified speaker.