Abstract: A method for synthesizing a composition comprising at least one acid ester stemming from the biomass and an organic biosolvent is provided. The method comprises the esterification reaction between at least one acid stemming from the biomass and at least one alcohol, in the presence of an acid catalyst and of the organic biosolvent, the organic biosolvent being selective of the ester or of the esters formed relatively to the acid or to the starting acids and non-miscible with the alcoholic solution of the acid stemming from the biomass.

Abstract: A method for synthesizing a composition comprising at least one acid ester stemming from the biomass and an organic biosolvent is provided. The method comprises the esterification reaction between at least one acid stemming from the biomass and at least one alcohol, in the presence of an acid catalyst and of the organic biosolvent, the organic biosolvent being selective of the ester or of the esters formed relatively to the acid or to the starting acids and non-miscible with the alcoholic solution of the acid stemming from the biomass.

Abstract: Circuits, devices, and methods for enabling the digitization of scanned images with an Analog Front End (AFE) circuit. The AFE circuit includes a sampler for sampling a signal produced by an image sensor and in response generating analog image samples. The AFE circuit also includes a Programmable Gain Amplifier for generating amplified samples by amplifying the analog image samples. The AFE circuit further includes an Analog to Digital Converter for generating digitized samples from the amplified samples; and a Digital Programmable Gain Amplifier for amplifying the digitized samples which are subsequently presented to a processor for further processing of the scanned image. Accordingly, the scanned image is digitized with amplification taking place both in the analog and in the digital domain, deriving benefits from each. The AFE circuit may be calibrated in two steps, once for each of the domains.

Abstract: Circuits, devices and methods provide a phase delay and use it to select when an analog color signal is converted to digital. The phase delay is adjustable, which permits choosing a moment in time when conversion results in improved processing. A PLL circuit receives the synchronizing signal of the color signals, and generates phased signals. A phase adjuster generates an adjustable delay signal by mixing in suitable proportions two of the phased signals that are 45 degrees apart. The delay signal is used by an analog to digital converter, to adjust when exactly it is to be sampled.

Abstract: An analog signal sampler with improved correlated double sampling (CDS) performance for imaging systems includes a dual mode input amplifier, a switched capacitor network and a differential amplifier. The dual mode input amplifier has a high input impedance and allows for receiving either positive-going contact image sensor (CIS) or negative-going charge couple device (CCD) image signals as desired. The switched capacitor network and differential amplifier together perform an improved CDS of the image signal and convert the unipolar input image signal to a bipolar differential output signal with an improved dynamic signal range. The CDS technique used relies upon simultaneous charging of the coupling and sample and hold capacitances with charge transfer from the coupling capacitance to the sample and hold capacitance. The gain of the sampler can be programmed by appropriate selection of the ratio of the coupling capacitance to the sample and hold capacitance.

Abstract: A MOSFET amplifier includes an amplifier stage with a boosted transconductance and a differential current mirror. The amplifier stage with a boosted transconductance includes complementary MOSFETs cross-connected with a fixed current source whereby the drain-to-source current and, therefore, the gate-to-source voltage, of the input MOSFET is fixed by the current source, while the drain-to-source current of the other MOSFET is dependent upon the input signal voltage. The differential current mirror includes a multiple branch differential input stage with a bridging resistor connected between the differential branches. The bridging resistor conducts a bridging current which equals one half of the difference between the differential branch currents, is substantially zero when the differential input voltage is zero and is nonzero when the differential input voltage is nonzero.

Abstract: A multistage pipelined analog to digital converter architecture that significantly reduces non-linearity by a novel control switching technique is introduced. A first aspect of the present invention embraces a sample and hold circuit that includes a logic circuit, a plurality of reference signal nodes, an input signal node, an output signal node, a sample signal node, a first switching node, a second switching node, a circuit reference node, a first capacitor, a second capacitor, a signal routing circuit, and amplifier, which are inter-coupled to provide an output analog residue signal. At each stage of the pipelined architecture the sample and hold switch control logic alternately samples and amplifies signals inputted thereto and effectively reduce capacitor mismatch errors. This has the advantageous result of reducing non-linearity. According to a second aspect, the sample and hold circuit uses a differential amplifier having an inverting input and a non-inverting input.