Abstract: Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate so that bubbles of the implanted ion species are formed in the Si at an appropriate distance from the buffer/Si interface so that the bubbles will not migrate to the Si surface during annealing, but are close enough to the interface so that a strain field around the bubbles will be sensed by dislocations at the buffer/Si interface and dislocations are attracted by the strain field caused by the bubbles and move into the Si substrate instead of into the buffer epi-layer. Fabrication of improved integrated devices based on GaN and Si, such as continuous wave (CW) lasers and light emitting diodes, at reduced cost is thereby enabled.

Abstract: Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate so that bubbles of the implanted ion species are formed in the Si at an appropriate distance from the buffer/Si interface so that the bubbles will not migrate to the Si surface during annealing, but are close enough to the interface so that a strain field around the bubbles will be sensed by dislocations at the buffer/Si interface and dislocations are attracted by the strain field caused by the bubbles and move into the Si substrate instead of into the buffer epi-layer. Fabrication of improved integrated devices based on GaN and Si, such as continuous wave (CW) lasers and light emitting diodes, at reduced cost is thereby enabled.

Abstract: A material with reduced surface defects includes a defect filter layer on an underlying material. The defect filter reduces dislocations and defects present in an underlying material. The defect filter include islands of one material formed on the underlying material and a continuous layer of a second material over the islands. The pair of layers is repeated a plurality of times to reduce the number of defects emanating from the underlying material.

Abstract: A material with reduced surface defects includes a defect filter layer on an underlying material. The defect filter reduces dislocations and defects present in an underlying material. The defect filter include islands of one material formed on the underlying material and a continuous layer of a second material over the islands. The pair of layers is repeated a plurality of times to reduce the number of defects emanating from the underlying material.

Abstract: A method is disclosed of epitaxially depositing a semiconductor material on a substrate of different material while accommodating lattice mismatch in a manner that results in improved epitaxially deposited material. In a disclosed embodiment GaAs is epitaxially deposited by molecular beam epitaxy on a silicon substrate having a {100} crystallographic surface tilted in the <001> direction. Improved semiconductor devices, made using the disclosed technique, are also set forth.

Abstract: A strained In.sub.y Ga.sub.l-y As layer is employed in a GaAs/Al.sub.x Ga.sub.l-x As transistor. Since the bandgap of In.sub.y Ga.sub.l-y As is much smaller than that of GaAs, there is no need for a troublesome large-mole-fraction of aluminum in the Al.sub.x Ga.sub.l-x As layer in order to maintain a large bandgap discontinuity. This and other advantages of the structure set forth result in devices having improved operating characteristics.

Abstract: The disclosed device is a field-effect transistor which includes a support region that may typically comprise a substrate having a buffer layer thereon. A semiconductor channel layer of one conductivity type is disposed on the support region. A first highly-doped semiconductor layer of opposite conductivity type is disposed on the channel layer. A second highly-doped semiconductor layer of said one conductivity type is disposed on the first highly-doped semiconductor layer. Source and drain electrodes are disposed in spaced relation, and contact the channel layer. A gate electrode is disposed on the second highly-doped semiconductor layer in the region between the source and drain electrodes. In a preferred embodiment, the source and drain electrodes are disposed on the second highly-doped semiconductor layer and extend through the second and first highly-doped semiconductor layers to the channel layer. The first and second highly-doped layers are thin enough to be fully depleted by adjacent layers.

Abstract: Described is a heterostructure semiconductor device of sandwich type construction. The central layer exhibits high charge carrier mobility and a relatively narrow band gap characteristic. The outer sandwich layers exhibit low charge carrier mobilities and a larger band gap characteristic. Under quiescent conditions, the charge carriers from the outer sandwich layers reside in the central layer due to the "potential well" created by the band gap difference between the layers. The application of an appropriate electrical field to the central layer, aligned with the interface between the layers, causes a very rapid transfer of the electrons residing therein to the outer sandwich layers. This transfer results in the device exhibiting a negative resistance characteristic. Two and three terminal switching applications of the device are described as well as its application as a radiant energy detector.