Abstract: An LCD device includes an insulating substrate; a gate line disposed on the insulating substrate; a first data line disposed perpendicular to the gate line and separated from the gate line; a second data line disposed crossing the gate line on a same line as the first data line; a thin film transistor disposed substantially at a crossing point of the gate line and the second data line; an active layer disposed below the second data line, a source electrode, and a drain electrode of the thin film transistor; a third data line disposed perpendicular to the gate line to define a pixel region to electrically connect the first and second data lines with each other; and a pixel electrode disposal in the pixel region.

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Abstract: An LCD device includes an insulating substrate; a gate line disposed on the insulating substrate; a first data line disposed perpendicular to the gate line and separated from the gate line; a second data line disposed crossing the gate line on a same line as the first data line; a thin film transistor disposed substantially at a crossing point of the gate line and the second data line; an active layer disposed below the second data line, a source electrode, and a drain electrode of the thin film transistor; a third data line disposed perpendicular to the gate line to define a pixel region to electrically connect the first and second data lines with each other; and a pixel electrode disposal in the pixel region.

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Abstract: A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.