Patents by Inventor Hae Jun Park

Hae Jun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160086737
    Abstract: An electrode for a dye-sensitized solar cell of the present invention includes a substrate; and a nanocomposite layer including a nanocomposite formed on the substrate, wherein the nanocomposite contains: metal, metal oxide or both; and inorganic materials, a conductive polymer or both.
    Type: Application
    Filed: April 23, 2014
    Publication date: March 24, 2016
    Inventors: Hwa Jung KIM, Hae Jun PARK, Ju Woon LEE
  • Patent number: 9285420
    Abstract: Disclosed is an apparatus for spinning a test tray and an in-line test handler including the above apparatus, wherein the apparatus may include a supporting unit for supporting a test tray transported between first and second chamber units facing in the different directions, wherein the first chamber unit is provided at a predetermined interval from the second chamber unit; a base unit to which the supporting unit is spinnably connected; and a spinning unit which spins the test tray so that semiconductor devices received in the test tray are tested at the same arrangement in each of the first chamber unit and the second chamber unit.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: March 15, 2016
    Assignee: MIRAE CORPORATION
    Inventors: Kyung Tae Kim, Chan Ho Park, Jae Gue Lee, Ung Hyun Yoo, Hae Jun Park, Kook Hyung Lee, Hyun Chae Chung, Jang Yong Park
  • Publication number: 20140203832
    Abstract: Disclosed is an apparatus for spinning a test tray and an in-line test handler including the above apparatus, wherein the apparatus may include a supporting unit for supporting a test tray transported between first and second chamber units facing in the different directions, wherein the first chamber unit is provided at a predetermined interval from the second chamber unit; a base unit to which the supporting unit is spinnably connected; and a spinning unit which spins the test tray so that semiconductor devices received in the test tray are tested at the same arrangement in each of the first chamber unit and the second chamber unit.
    Type: Application
    Filed: January 22, 2014
    Publication date: July 24, 2014
    Applicant: MIRAE CORPORATION
    Inventors: Kyung Tae KIM, Chan Ho PARK, Jae Gue LEE, Ung Hyun YOO, Hae Jun PARK, Kook Hyung LEE, Hyun Chae CHUNG, Jang Yong PARK
  • Patent number: 8613871
    Abstract: Provided is a nanocomplex comprising a core consisting of a metal; and a periphery being formed on a surface of the core to surround the core and consisting of an inorganic substance and a conductive polymer.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: December 24, 2013
    Assignee: Korea Atomic Energy Research Institute
    Inventors: Hae Jun Park, Hwa-Jung Kim, Sang Hyun Park
  • Publication number: 20110031450
    Abstract: Provided is a nanocomplex comprising a core consisting of a metal; and a periphery being formed on a surface of the core to surround the core and consisting of an inorganic substance and a conductive polymer
    Type: Application
    Filed: April 9, 2010
    Publication date: February 10, 2011
    Applicant: KOREA ATOMIC ENERGY RESEARCH INSTITUTE
    Inventors: Hae Jun Park, Hwa-Jung Kim, Sang Hyun Park
  • Patent number: 7772834
    Abstract: A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending unit, and a chamber system. A passage site connects the loading unit and the chamber system, and also connects the chamber system and the unloading unit. The arrangement of the handler reduces the time for the loading and unloading processes by performing the loading and unloading processes on separate test trays located at separate loading and unloading positions.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: August 10, 2010
    Assignee: Mirae Corporation
    Inventors: Jung Ug An, Wan Hee Choi, Hae Jun Park, Kyeong Tae Kim
  • Publication number: 20090237089
    Abstract: An apparatus for transferring packaged chips, a test handler, and a method for manufacturing packaged chips are provided. The apparatus for transferring packaged chips may include a main frame having a coupling member coupled to a base plate and a supporting member coupled to the coupling member, a plurality of first pickers coupled to one side of the supporting member so as to be movable in a horizontal direction, a plurality of second pickers coupled to the other side of the supporting member so as to be movable in the horizontal direction, and a control unit to determine distances by which the first pickers and the second pickers move in the horizontal direction.
    Type: Application
    Filed: December 19, 2008
    Publication date: September 24, 2009
    Inventors: Jae Kyung CHO, Hae Jun Park
  • Patent number: 7495463
    Abstract: A handler for handling semiconductor chips during a testing process includes a loading position at which packaged chips are loaded into a test tray, and an unloading position at which the packaged chips are unloaded from the test tray. The test tray follows a path through the handler from the loading position to the unloading position, and from the unloading position to the loading position. By separately performing the loading and unloading operations at these different positions within the handler, malfunctions in loading and unloading pickers that load and unload the chips may be reduced. Further, a malfunction in one picker performing one operation may be prevented from influencing operations of the other picker performing another operation. Additionally, collision between the loading picker and the unloading picker may be prevented.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: February 24, 2009
    Assignee: Mirae Corporation
    Inventors: Jung Ug An, Hae Jun Park, Kyung Min Hyun, Wan Hee Choi
  • Publication number: 20090033352
    Abstract: A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending unit, and a chamber system. A passage site connects the loading unit and the chamber system, and also connects the chamber system and the unloading unit. The arrangement of the handler reduces the time for the loading and unloading processes by performing the loading and unloading processes on separate test trays located at separate loading and unloading positions.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 5, 2009
    Inventors: Jung Ug AN, Wan Hee CHOI, Hae Jun PARK, Kyeong Tae KIM
  • Publication number: 20080297140
    Abstract: A handler for handling semiconductor chips during a testing process includes a loading position at which packaged chips are loaded into a test tray, and an unloading position at which the packaged chips are unloaded from the test tray. The test tray follows a path through the handler from the loading position to the unloading position, and from the unloading position to the loading position. By separately performing the loading and unloading operations at these different positions within the handler, malfunctions in loading and unloading pickers that load and unload the chips may be reduced. Further, a malfunction in one picker performing one operation may be prevented from influencing operations of the other picker performing another operation. Additionally, collision between the loading picker and the unloading picker may be prevented.
    Type: Application
    Filed: February 28, 2008
    Publication date: December 4, 2008
    Inventors: Jung Ug AN, Hae Jun Park, Kyung Min Hyun, Wan Hee Choi
  • Publication number: 20080012113
    Abstract: A carrier module for a test tray includes a main body having an insertion slot that passes through the main body. An upright-positionable packaged chip can be inserted into the insertion slot, and a holding unit, provided on the main body holds and releases the upright-positionable packaged chip. The upright positionable packaged chip is held in a position where electrical contacts on the chip package are exposed from the main body so that the chip package can be tested.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 17, 2008
    Inventor: Hae Jun Park