Patents by Inventor Hae Kyo Seo

Hae Kyo Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11818841
    Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes a core layer; a through portion penetrating through the core layer; a first via disposed to be spaced apart from an inner wall of the through portion within the through portion; and a second via disposed in the first via and having a diameter different from that of the first via.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: November 14, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hae Kyo Seo, Jin Won Lee
  • Publication number: 20230178902
    Abstract: An antenna substrate includes a skin layer containing an insulating material, a ground layer containing a conductive material, an insulating layer disposed between the skin layer and the ground layer and including an insulating material different from the insulating material of the skin layer, a plurality of patch antennas disposed between the ground layer and the skin layer, a shielding member disposed between the ground layer and the skin layer, spaced apart from the plurality of patch antennas, and connected to the ground layer, and a shielding post connected to the shielding member, and protruding further than an outer surface of the skin layer, from the shielding member in a direction facing the skin layer, at least a portion of the shielding post being disposed between the plurality of patch antennas.
    Type: Application
    Filed: April 12, 2022
    Publication date: June 8, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Moon Hee YI, Hae Kyo SEO, Yong Hoon KIM, Seung Eun LEE
  • Publication number: 20220346230
    Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes a core layer; a through portion penetrating through the core layer; a first via disposed to be spaced apart from an inner wall of the through portion within the through portion; and a second via disposed in the first via and having a diameter different from that of the first via.
    Type: Application
    Filed: July 9, 2021
    Publication date: October 27, 2022
    Inventors: Hae Kyo Seo, Jin Won Lee
  • Patent number: 11316251
    Abstract: A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: April 26, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Jin Won Lee, Hae Kyo Seo
  • Publication number: 20220013882
    Abstract: A radio frequency package includes a first connection member having a first stack structure including at least one first insulating layer and at least one first wiring layer; a second connection member having a second stack structure including at least one second insulating layer and at least one second wiring layer; a core member including a core insulating layer and disposed between the first and second connection members; and a first chip antenna disposed to be surrounded by the core insulating layer. The first chip antenna includes a first dielectric layer disposed to be surrounded by the core insulating layer; a patch antenna pattern disposed on an upper surface of the first dielectric layer; and a feed via disposed to at least partially penetrate the first dielectric layer, providing a feed path of the patch antenna pattern and connected to the at least one first wiring layer.
    Type: Application
    Filed: December 2, 2020
    Publication date: January 13, 2022
    Inventors: Jae Woong Choi, Jin Won Lee, Hae Kyo Seo