Patents by Inventor Hae Taek Kim
Hae Taek Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11830923Abstract: Disclosed is an RF switch device and, more particularly, an RF switch device having an air gap over a gate electrode and a metal interconnect at a position higher than the air gap and that at least partially overlap the air gap in the vertical direction, thereby preventing exposure of an upper portion of the air gap in subsequent processing.Type: GrantFiled: April 11, 2022Date of Patent: November 28, 2023Assignee: DB HiTek, Co., Ltd.Inventors: Seung Hyun Eom, Jin Hyo Jung, Hae Taek Kim, Ja Geon Koo, Ki Won Lim, Hyun Joong Lee, Sang Yong Lee
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Publication number: 20230335611Abstract: Provided is an RF switch device and a method of manufacturing the same and, more particularly, to an RF switch device that improves the on-resistance (Ron) of the RF switch by including an integral or integrally formed P diode. The RF switch device includes a first active region on a first substrate as a first base, a second active region on the first substrate spaced apart from the first active region as a second base, and a gate electrode on the first active region and on the second active region.Type: ApplicationFiled: February 20, 2023Publication date: October 19, 2023Inventors: Ja Geon KOO, Jin Hyo JUNG, Hae Taek KIM, Hyun Joong LEE, Jung Ah KIM
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Patent number: 11640938Abstract: A semiconductor device is disclosed. The semiconductor device includes impurity regions formed in surface portions of a substrate, gate structures formed on surface portions of the substrate between the impurity regions, a first insulating layer formed on the impurity regions and the gate structures, first wiring patterns formed on the first insulating layer, and first contact patterns connecting the impurity regions and the first wiring patterns through the first insulating layer, and the first wiring patterns are arranged in a zigzag shape.Type: GrantFiled: August 30, 2021Date of Patent: May 2, 2023Assignee: DB HITEK CO., LTD.Inventors: Ki Won Lim, Jin Hyo Jung, Hae Taek Kim, Seung Hyun Eom, Ja Geon Koo, Hyun Joong Lee, Sang Yong Lee
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Publication number: 20220367354Abstract: An RF switch device and a method of manufacturing the same are disclosed. More particularly, an RF switch device in a stacked configuration and a method of manufacturing the same seeking to reduce or eliminate a voltage imbalance, a condition in which different voltages are applied to different stages of the RF switch device, by forming air gaps on or over corresponding gate electrodes, in which each of the air gaps in a single stage has a different width.Type: ApplicationFiled: April 27, 2022Publication date: November 17, 2022Inventors: Ki Won LIM, Jin Hyo JUNG, Hae Taek KIM, Seung Hyun EOM, Ja Geon KOO, Hyun Joong LEE, Sang Yong LEE
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Publication number: 20220336620Abstract: Disclosed is an RF switch device and, more particularly, an RF switch device having an air gap over a gate electrode and a metal interconnect at a position higher than the air gap and that at least partially overlap the air gap in the vertical direction, thereby preventing exposure of an upper portion of the air gap in subsequent processing.Type: ApplicationFiled: April 11, 2022Publication date: October 20, 2022Inventors: Seung Hyun EOM, Jin Hyo JUNG, Hae Taek KIM, Ja Geon KOO, Ki Won LIM, Hyun Joong LEE, Sang Yong LEE
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Patent number: 11362655Abstract: Provided is an RF switch device (100) in which body contact regions (190) are formed at respective positions adjacent to or partially overlapping opposite ends of a gate region (110) so that holes in a body of the device can escape or flow in either or both of two directions, rather than in only a single direction.Type: GrantFiled: February 25, 2021Date of Patent: June 14, 2022Assignee: DB HiTek Co., Ltd.Inventors: Ja-Geon Koo, Jin-Hyo Jung, Hae-Taek Kim, Seung-Hyun Eom, Ki-Won Lim, Hyun-Joong Lee, Sang-Yong Lee
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Publication number: 20220068793Abstract: A semiconductor device is disclosed. The semiconductor device includes impurity regions formed in surface portions of a substrate, gate structures formed on surface portions of the substrate between the impurity regions, a first insulating layer formed on the impurity regions and the gate structures, first wiring patterns formed on the first insulating layer, and first contact patterns connecting the impurity regions and the first wiring patterns through the first insulating layer, and the first wiring patterns are arranged in a zigzag shape.Type: ApplicationFiled: August 30, 2021Publication date: March 3, 2022Inventors: Ki Won LIM, Jin Hyo JUNG, Hae Taek KIM, Seung Hyun EOM, Ja Geon KOO, Hyun Joong LEE, Sang Yong LEE
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Publication number: 20210281260Abstract: Provided is an RF switch device (100) in which body contact regions (190) are formed at respective positions adjacent to or partially overlapping opposite ends of a gate region (110) so that holes in a body of the device can escape or flow in either or both of two directions, rather than in only a single direction.Type: ApplicationFiled: February 25, 2021Publication date: September 9, 2021Inventors: Ja-Geon KOO, Jin-Hyo JUNG, Hae-Taek KIM, Seung-Hyun EOM, Ki-Won LIM, Hyun-Joong LEE, Sang-Yong LEE
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Patent number: 10482824Abstract: A voltage generator configured to generate a plurality of voltage groups, each of the plurality of voltage groups including a plurality of reference voltages, and a decoder having an output node configured to output one of the plurality of reference voltages is disclosed. The decoder includes switch blocks that correspond to the plurality of voltage groups. Each of the switch blocks includes transistors that are turned on or off by or in response to a control signal, and each transistor in one of the switch blocks has a channel width different from a channel width of each transistor in another one of the switch blocks.Type: GrantFiled: March 8, 2018Date of Patent: November 19, 2019Assignee: DB HiTek Co., Ltd.Inventors: Kee Joon Choi, Hae Taek Kim, Sang Gi Lee
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Publication number: 20190088780Abstract: A DEMOS transistor includes a semiconductor substrate defining a field region and an active region, a gate pattern disposed on the semiconductor substrate, the gate pattern being positioned over both the active region and the field region, drift regions disposed in the active region and positioned adjacent to both sides of the gate pattern, high concentration ion regions disposed in the drift regions, and being spaced apart from the gate pattern, and a silicide blocking layer having a exposure hole exposing one of an upper surface of the gate pattern and the high concentration ion regions, the silicide blocking layer having a ring shape to at least partially surround one of the upper surface of the gate pattern and the high concentration ion regions.Type: ApplicationFiled: September 19, 2018Publication date: March 21, 2019Inventors: Kee Joon CHOI, Bon Sug KOO, Bum Seok KIM, Mi Hye JUN, Hae Taek KIM, Duk Joo WOO
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Publication number: 20180342210Abstract: A voltage generator configured to generate a plurality of voltage groups, each of the plurality of voltage groups including a plurality of reference voltages, and a decoder having an output node configured to output one of the plurality of reference voltages is disclosed. The decoder includes switch blocks that correspond to the plurality of voltage groups. Each of the switch blocks includes transistors that are turned on or off by or in response to a control signal, and each transistor in one of the switch blocks has a channel width different from a channel width of each transistor in another one of the switch blocks.Type: ApplicationFiled: March 8, 2018Publication date: November 29, 2018Inventors: Kee Joon CHOI, Hae Taek KIM, Sang Gi LEE
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Patent number: 10008594Abstract: A high voltage semiconductor device includes a gate electrode structure disposed on a substrate, a source region disposed in the substrate to be adjacent to one side of the gate electrode structure, a first drift region disposed in the substrate to be adjacent to another side of the gate electrode structure, a drain region electrically connected with the first drift region, and a device isolation region disposed on one side of the drain region. Particularly, the first drift region is spaced apart from the device isolation region.Type: GrantFiled: March 10, 2017Date of Patent: June 26, 2018Assignee: DB HITEK CO., LTD.Inventors: Kee Joon Choi, Bum Seok Kim, Bon Sug Koo, Mi Hye Jun, Hae Taek Kim, Duk Joo Woo
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Publication number: 20170278922Abstract: A high voltage semiconductor device includes a gate electrode structure disposed on a substrate, a source region disposed in the substrate to be adjacent to one side of the gate electrode structure, a first drift region disposed in the substrate to be adjacent to another side of the gate electrode structure, a drain region electrically connected with the first drift region, and a device isolation region disposed on one side of the drain region. Particularly, the first drift region is spaced apart from the device isolation region.Type: ApplicationFiled: March 10, 2017Publication date: September 28, 2017Inventors: Kee Joon Choi, Bum Seok Kim, Bon Sug Koo, Mi Hye Jun, Hae Taek Kim, Duk Joo Woo