Patents by Inventor Hae Yong Lee

Hae Yong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250020419
    Abstract: The present invention provides a manifold refrigerant module comprising: a manifold plate having a plurality of refrigerant flow paths formed therein; and a plurality of heat exchangers arranged on the manifold plate, wherein the plurality of heat exchangers are arranged in the left-right direction or the up-down direction.
    Type: Application
    Filed: January 5, 2023
    Publication date: January 16, 2025
    Inventors: In Guk HWANG, Sang Yong RHEE, Sung Je LEE, Hae Jun LEE
  • Publication number: 20230193509
    Abstract: The present invention relates to a Ga2O3 crystal film deposition method according to HVPE, a deposition apparatus, and a Ga2O3 crystal film-deposited substrate using the same. According to an embodiment of the present invention, a Ga2O3 crystal film deposition method, which includes a first step of supplying GaCl gas onto a single-crystal semiconductor substrate via a central supply channel and a second step of supplying oxygen and HCl gas onto the single-crystal semiconductor substrate onto which the GaCl gas is supplied, is provided.
    Type: Application
    Filed: August 9, 2022
    Publication date: June 22, 2023
    Applicant: LumiGNtech Co., Ltd.
    Inventors: Hae Yong LEE, Young Jun CHOI, Hae Gon OH
  • Patent number: 11682301
    Abstract: The automatic control system of the smart bus platform includes a plurality of electronic devices provided in the shelter and a control unit. The control unit controls at least one of the plurality of electronic devices based on at least one of the number of users and a prospective staying time of the users in the shelter.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: June 20, 2023
    Assignee: E.P. Korea Co., Ltd.
    Inventor: Hae Yong Lee
  • Publication number: 20230175121
    Abstract: A method for growing a nitride film in accordance with an exemplary embodiment includes charging a substrate into a growth space, and growing a nitride film on the substrate, wherein the growing of a nitride film may include reacting a first reaction gas with a source raw material to supply a generated gas to the growth space, supplying a second reaction gas to the growth space, and supplying an oxygen-containing gas and a hydrogen-containing gas to the growth space. Accordingly, according to exemplary embodiments, even when a nitride film is formed thin, it is possible to planarize the upper surface of the nitride film. Accordingly, it is possible to reduce process time required to grow or form the nitride film until the upper surface thereof is planarized, and thus, there is an effect of improving the production rate.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 8, 2023
    Inventors: Hae Yong LEE, Young Jun CHOI, Hae Gon OH
  • Publication number: 20220406185
    Abstract: The automatic control system of the smart bus platform includes a plurality of electronic devices provided in the shelter and a control unit. The control unit controls at least one of the plurality of electronic devices based on at least one of the number of users and a prospective staying time of the users in the shelter.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 22, 2022
    Inventor: Hae Yong Lee
  • Publication number: 20220013357
    Abstract: Provided is a method for manufacturing a monocrystalline substrate, the method including: a process of forming a seed layer on a base charged into a monocrystalline growth apparatus; a process of taking the base, on which the seed layer is formed, out of the monocrystalline growth apparatus and irradiating laser onto the seed layer from a lower side of the base to form a separation layer having a plurality of voids; a process of charging the base, on which the separation layer is formed, into the monocrystalline growth apparatus to form a monocrystalline layer on the separation layer; and a separation process of taking the base, on which the separation layer and the monocrystalline layer are formed, out of the monocrystalline growth apparatus to separate the monocrystalline layer from the base.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 13, 2022
    Inventors: Hae Yong LEE, Young Jun CHOI, Hae Gon OH
  • Patent number: 8853064
    Abstract: The present invention is directed to a method of manufacturing a substrate, which includes loading a base substrate into a reaction furnace; forming a buffer layer on the base substrate; forming a separation layer on the buffer layer; forming a semiconductor layer on the separation layer at least two; and separating the semiconductor layer from the base substrate via the separation layer through natural cooling by unloading the base substrate from the reaction furnace.
    Type: Grant
    Filed: October 21, 2012
    Date of Patent: October 7, 2014
    Assignee: Lumigntech Co., Ltd.
    Inventors: Hae Yong Lee, Young Jun Choi, Jin Hun Kim, Hyun soo Jang, Hea Kon Oh, Hyun Hee Hwang
  • Patent number: 8729670
    Abstract: Provided is a semiconductor substrate and a method for manufacturing the same. The semiconductor substrate includes a substrate, a discontinuously formed hemispheric metal layer on the substrate, and a semiconductor layer on the hemispheric metal layer. A plurality of voids on the interface of the substrate and discontinuous hemisphere are formed to absorb or relax the stain of interface. Accordingly, even if a subsequent layer is relatively thickly formed on the substrate, substrate bow or warpage can be minimized.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: May 20, 2014
    Assignee: Lumigntech Co., Ltd.
    Inventors: Hae Yong Lee, Young Jun Choi, Jung Gyu Kim
  • Publication number: 20110101307
    Abstract: Provided are a semiconductor substrate including an uneven structure disposed on a surface of a substrate, a buffer layer disposed on the uneven structure, the buffer layer having an acicular structure, a compound semiconductor layer disposed on the buffer layer to planarize the uneven structure, and a plurality of voids defined between the substrate and the compound semiconductor layer, and a method for manufacturing the same. Thus, since the acicular structure disposed on the uneven structure of the substrate forms the voids on an interface between the substrate and the single crystal GaN layer to relax a stress due to a lattice mismatch and intercept propagation of a breakdown potential, a warpage characteristic of the grown single crystal GaN layer may be reduced, as well as, crystallinity may be improved.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 5, 2011
    Applicant: LUMIGNTECH CO., LTD.
    Inventors: Hae Yong LEE, Young Jun CHOI, Jung Gyu KIM, Hyun Hee HWANG
  • Publication number: 20110024878
    Abstract: Provided is a semiconductor substrate and a method for manufacturing the same. The semiconductor substrate includes a substrate, a discontinuously formed hemispheric metal layer on the substrate, and a semiconductor layer on the hemispheric metal layer. A plurality of voids on the interface of the substrate and discontinuous hemisphere are formed to absorb or relax the stain of interface. Accordingly, even if a subsequent layer is relatively thickly formed on the substrate, substrate bow or warpage can be minimized.
    Type: Application
    Filed: April 15, 2009
    Publication date: February 3, 2011
    Applicant: LUMIGNTECH CO., LTD.
    Inventors: Hae Yong Lee, Young Jun Choi, Jung Gyu Kim
  • Patent number: 7854316
    Abstract: A dental implant package includes a main body having a partition portion that is formed therein and separates a fixture accommodation space accommodating a fixture of a dental implant from an auxiliary accommodation space accommodating any of a healing abutment and a cover screw, wherein a first opening and a second opening are formed at both ends of the main body, a leveler accommodated in at least a part of the fixture accommodation space and supporting the fixture accommodated in the fixture accommodation space at a predetermined height, a first cover detachably coupled to the main body and blocking the first opening, and a second cover detachably coupled to the main body and blocking the second opening. The fixture and any of the healing abutment and the cover screw can be stored with a simple structure. Also, the fixture and the healing abutment or the cover screw can be easily pulled out during an implant operation.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: December 21, 2010
    Assignee: Megagen Implant Co., Ltd.
    Inventors: Kwang Bum Park, Kyoung Ho Ryoo, Seok Kyu Choi, Hae Yong Lee
  • Publication number: 20100065443
    Abstract: A dental implant package includes a main body having a partition portion that is formed therein and separates a fixture accommodation space accommodating a fixture of a dental implant from an auxiliary accommodation space accommodating any of a healing abutment and a cover screw, wherein a first opening and a second opening are formed at both ends of the main body, a leveler accommodated in at least a part of the fixture accommodation space and supporting the fixture accommodated in the fixture accommodation space at a predetermined height, a first cover detachably coupled to the main body and blocking the first opening, and a second cover detachably coupled to the main body and blocking the second opening. The fixture and any of the healing abutment and the cover screw can be stored with a simple structure. Also, the fixture and the healing abutment or the cover screw can be easily pulled out during an implant operation.
    Type: Application
    Filed: December 13, 2006
    Publication date: March 18, 2010
    Applicant: MEGAGEN IMPLANT CO., LTD.
    Inventors: Kwang Bum Park, Kyoung Ho Ryoo, Seok Kyu Choi, Hae Yong Lee
  • Patent number: 7621998
    Abstract: The present invention relates to a freestanding, thick, single crystalline gallium nitride (GaN) film having significantly reduced bending deformation. The inventive GaN film having a crystal tilt angle of C-axis to the <0001> direction per surface distance of 0.0022°/mm exhibits little bending deformation even at a thickness of 1 mm or more, and therefore, is beneficially used as a substrate for a luminescent device.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: November 24, 2009
    Assignee: Samsung Corning Co., Ltd.
    Inventors: Changho Lee, Hyun Min Shin, Sun-Hwan Kong, Hae Yong Lee
  • Patent number: 7534008
    Abstract: A backlight unit includes a substrate, a plurality of light emitting diodes disposed at corners of a polygon or arranged side by side on the substrate, and a plurality of lenses coupled to the light emitting diodes for directing the lights emitted from the light emitting diodes in a predetermined direction. The light emitting diodes are comprised of at least three light emitting diodes capable of cooperating with each other to create a white light. Each of the lenses has an asymmetrical irradiation characteristic such that the lenses allow the lights to be irradiated on a predetermined target region and uniformly mixed with each other. The lenses are designed and oriented to irradiate the lights in an elliptical shape close to a rectangle toward a top portion of the backlight unit.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: May 19, 2009
    Assignee: Samsung Corning Precision Glass Co., Ltd.
    Inventors: Dae Hyun Kim, Hae Yong Lee, Yong Won Choi
  • Patent number: 7518151
    Abstract: The present invention relates to a gallium nitride/sapphire thin film, wherein a curvature radius thereof is positioned on the right side of a curve plotted from the following functional formula (I): Y=Y0+A·e?(x1?1)/T1+B·(1?e?x2/T2)??(I) wherein Y is the curvature radius (m) of a gallium nitride/sapphire thin film, x1 is the thickness (?m) of a gallium nitride layer, x2 is the thickness (mm) of a sapphire substrate, Y0 is ?107±2.5, A is 24.13±0.50, B is 141±4.5, T1 is 0.56±0.04, and T2 is 0.265±0.5.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: April 14, 2009
    Assignee: Samsung Corning Co., Ltd.
    Inventors: Chang Ho Lee, Hae Yong Lee, Choon Kon Kim, Kisoo Lee
  • Publication number: 20080248259
    Abstract: The present invention relates to a gallium nitride/sapphire thin film, wherein a curvature radius thereof is positioned on the right side of a curve plotted from the following functional formula (I): Y=Y0+A·e?(x1?1)/T1+B·(1?e?x2/T2) ??(I) wherein Y is the curvature radius (m) of a gallium nitride/sapphire thin film, x1 is the thickness (?m) of a gallium nitride layer, x2 is the thickness (mm) of a sapphire substrate, Y0 is ?107±2.5, A is 24.13±0.50, B is 141±4.5, T1 is 0.56±0.04, and T2 is 0.265±0.5.
    Type: Application
    Filed: October 9, 2007
    Publication date: October 9, 2008
    Applicant: SAMSUNG CORNING CO., LTD.
    Inventors: Chang Ho Lee, Hae Yong Lee, Choon Kon Kim, Kisoo Lee
  • Patent number: 7315045
    Abstract: The present invention relates to a sapphire/gallium nitride laminate, wherein a curvature radius thereof is positioned on the right side of a first curve plotted from the following functional formula (I): Y=Y0+A·e?(x?1)/T??(I) wherein Y is the curvature radius (m) of a sapphire/gallium nitride laminate, X is the thickness (?m) of a gallium nitride film, Y0 is 5.47±0.34, A is 24.13±0.50, and T is 0.56±0.04. The inventive laminate can be advantageously used in the manufacture of a high quality electronic device.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: January 1, 2008
    Assignee: Samsung Corning Co., Ltd.
    Inventors: Chang Ho Lee, Hae Yong Lee, Choon Kon Kim
  • Publication number: 20050247260
    Abstract: A single crystalline a-plane nitride semiconductor wafer having no voids, bending or cracks can be rapidly and effectively prepared by hydride vapor phase epitaxy (HVPE) growth of the a-plane nitride semiconductor film on a single crystalline r-plane sapphire substrate at a temperature ranging from 950 to 1,100° C. and at a rate ranging from 30 to 300 ?m/hr.
    Type: Application
    Filed: April 28, 2005
    Publication date: November 10, 2005
    Inventors: Hyunmin Shin, Hae-Yong Lee, Changho Lee, Hyun-Suk Kim, Chong-Don Kim, Sun-Hwan Kong
  • Publication number: 20050133798
    Abstract: A nitride semiconductor template having nano-voids at an interface between a substrate having one embossed surface and a nitride semiconductor layer can be rapidly prepared by hydride vapor phase epitaxy (HVPE) growth of the nitride semiconductor layer on the embossed surface of the substrate.
    Type: Application
    Filed: December 20, 2004
    Publication date: June 23, 2005
    Inventors: Hyun-Min Jung, Hae-Yong Lee, Hyun-Min Shin, Choon-Kon Kim, Chang-Ho Lee, Jeong-Wook Lee, Cheol-Soo Sone, Jae-Hee Cho