Patents by Inventor Haengcheol Choi

Haengcheol Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230343720
    Abstract: A semiconductor device has a substrate and a first electrical component disposed over a first surface of the substrate. An RF antenna interposer is disposed over the substrate with the first electrical component connected to a first antenna disposed on a surface of the antenna interposer. An area of the antenna interposer is substantially the same as an area of the substrate. The first antenna disposed on the surface of the antenna interposer has a plurality of islands of conductive material. Alternatively, the first antenna disposed on the surface of the antenna interposer has a spiral shape of conductive material. A second antenna can be disposed on the surface of the antenna interposer connected to a second electrical component disposed over the substrate. A second electrical component can be disposed over a second surface of the substrate opposite the first surface of the substrate.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: NamJu Cho, YoungCheol Kim, HaengCheol Choi
  • Patent number: 11735530
    Abstract: A semiconductor device has a substrate and a first electrical component disposed over a first surface of the substrate. An RF antenna interposer is disposed over the substrate with the first electrical component connected to a first antenna disposed on a surface of the antenna interposer. An area of the antenna interposer is substantially the same as an area of the substrate. The first antenna disposed on the surface of the antenna interposer has a plurality of islands of conductive material. Alternatively, the first antenna disposed on the surface of the antenna interposer has a spiral shape of conductive material. A second antenna can be disposed on the surface of the antenna interposer connected to a second electrical component disposed over the substrate. A second electrical component can be disposed over a second surface of the substrate opposite the first surface of the substrate.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: August 22, 2023
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: NamJu Cho, YoungCheol Kim, HaengCheol Choi
  • Publication number: 20230119181
    Abstract: A semiconductor device has a first substrate and a first electrical component disposed over the first substrate. The first electrical component has a second substrate, and redistribution layer formed over the second substrate. The first electrical component is disposed over the redistribution layer. The heat spreader is disposed over the first electrical component. A heat spreader is disposed over the first electrical component. The heat spreader has a first horizontal portion, second horizontal portion vertically offset from the first horizontal portion, and an angled portion connecting the first horizontal portion from the second horizontal portion. The second horizontal portion attaches to a surface of the first substrate proximate to a first side of the first electrical component. The heat spreader attaches to the first substrate proximate to a first side of the first electrical component and remains open proximate to a second side of the first electrical component.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: JongTae Kim, NamJu Cho, HaengCheol Choi
  • Publication number: 20230067475
    Abstract: A semiconductor device has a substrate and a first electrical component disposed over a first surface of the substrate. An RF antenna interposer is disposed over the substrate with the first electrical component connected to a first antenna disposed on a surface of the antenna interposer. An area of the antenna interposer is substantially the same as an area of the substrate. The first antenna disposed on the surface of the antenna interposer has a plurality of islands of conductive material. Alternatively, the first antenna disposed on the surface of the antenna interposer has a spiral shape of conductive material. A second antenna can be disposed on the surface of the antenna interposer connected to a second electrical component disposed over the substrate. A second electrical component can be disposed over a second surface of the substrate opposite the first surface of the substrate.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 2, 2023
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: NamJu Cho, YoungCheol Kim, HaengCheol Choi
  • Patent number: 8859342
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; and forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: October 14, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: Oh Han Kim, Haengcheol Choi, KyungOe Kim
  • Patent number: 8703541
    Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: April 22, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: Haengcheol Choi, Ki Youn Jang, Taewoo Kang, Il Kwon Shim
  • Publication number: 20130154079
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; and forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 20, 2013
    Inventors: Oh Han Kim, Haengcheol Choi, KyungOe Kim
  • Publication number: 20120193132
    Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.
    Type: Application
    Filed: April 6, 2012
    Publication date: August 2, 2012
    Inventors: Haengcheol Choi, Ki Youn Jang, Taewoo Kang, Il Kwon Shim
  • Patent number: 8178392
    Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: May 15, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Haengcheol Choi, Ki Youn Jang, Taewoo Kang, Il Kwon Shim
  • Patent number: 8124520
    Abstract: An integrated circuit mount system includes an integrated circuit, a solder mask for the integrated circuit, and a solder mask pad on the substrate with the solder mask.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: February 28, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: KyungOe Kim, Haengcheol Choi, Kyung Moon Kim, Rajendra D. Pendse
  • Publication number: 20080283998
    Abstract: An electronic system is provided including forming a substrate having a radiating patterned pad, mounting an electrical device having an external interconnect over the radiating patterned pad with the external interconnect offset from the radiating patterned pad, and aligning the external interconnect with the radiating patterned pad.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 20, 2008
    Inventors: Haengcheol Choi, Ki Youn Jang, Taewoo Kang, Il Kwon Shim
  • Publication number: 20080014738
    Abstract: An integrated circuit mount system includes an integrated circuit, a solder mask for the integrated circuit, and a solder mask pad on the substrate with the solder mask.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 17, 2008
    Applicant: STATS CHIPPAC LTD.
    Inventors: KyungOe Kim, Haengcheol Choi, Kyung Moon Kim, Rajendra D. Pendse
  • Publication number: 20070268660
    Abstract: A spacerless semiconductor package chip stacking system is provided having a substrate. The substrate has at least one window therethrough. A first semiconductor device is attached face down on the top of the substrate. A second semiconductor device is attached face up on the back of the first semiconductor device. The first semiconductor device is electrically connected through the window to the bottom of the substrate. The second semiconductor device is electrically connected to the substrate.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 22, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Seungyun Ahn, Youngcheol Kim, Haengcheol Choi, Myung Kil Lee, JoHyun Bae, Hyunil Bae, Junwoo Myung