Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

Abstract: A method is described for launching a vehicular camera application residing on a docked mobile communication device, such as a smartphone, tablet computer, or mp3 player, for example. A common feature for the many choices of a mobile communication device is that the mobile communication device comprises embedded data processing capability. The launching operation of the vehicular camera application includes detecting a communicative coupling of the mobile communication device with a docking device; and thereafter initiating the vehicular camera application that resides on the mobile communication device. Images are displayed on the mobile communication device that was captured by a vehicular camera or a camera integrated with the mobile communication device or communicatively coupled to the mobile communication device.

Abstract: A method for recording a geographical location from a docked mobile communication device that includes detecting a mobile communication device communicatively coupled to a docking device; and detecting that the mobile communication device is communicatively uncoupled from the docking device. Afterwards, the geographical location of the mobile communication device is recorded and stored in memory upon detecting that the mobile communication device has communicatively uncoupled from the docking device.

Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

Abstract: Connection between optical fibers and optical components within a semiconductor substrate. A lens is created at the front of a semiconductor substrate. A tapered hole is created in the back of the substrate exposing part or all of the surface of the lens. An optical component is formed or affixed at the front surface of the substrate. A volume of transparent adhesive is placed in the hole, followed by an optical fiber, which is thus coupled to the surface of the lens. A light guide is created on the front of the substrate overlying the lens to direct optical signals between the optical fiber inserted in the tapered hole and the optical component on the surface of the substrate.

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract: Connection between optical fibers and optical components within a semiconductor substrate. A lens is created at the front of a semiconductor substrate. A tapered hole is created in the back of the substrate exposing part or all of the surface of the lens. An optical component is formed or affixed at the front surface of the substrate. A volume of transparent adhesive is placed in the hole, followed by an optical fiber, which is thus coupled to the surface of the lens. A light guide is created on the front of the substrate overlying the lens to direct optical signals between the optical fiber inserted in the tapered hole and the optical component on the surface of the substrate.

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract: A microlens of an inorganic material having a relatively high index of refraction is formed with a convex lower surface for refracting light from above through an underlying spacer layer to converge on a photodiode therebelow. The microlens and photodiode may be replicated in an array of such elements along with color filters and CMOS circuit elements on a semiconductor chip to provide an image sensor. The spacer layer, which has a relatively low refractive index, is subjected to a selective isotropic etch through an opening in an etch mask to define a concave surface that forms an interface with the convex lower surface of the microlens upon subsequent conformal deposition of the material of the microlens.

Abstract: A microlens of an inorganic material having a relatively high index of refraction is formed with a convex lower surface for refracting light from above through an underlying spacer layer to converge on a photodiode therebelow. The microlens and photodiode may be replicated in an array of such elements along with color filters and CMOS circuit elements on a semiconductor chip to provide an image sensor. The spacer layer, which has a relatively low refractive index, is subjected to a selective isotropic etch through an opening in an etch mask to define a concave surface that forms an interface with the convex lower surface of the microlens upon subsequent conformal deposition of the material of the microlens.