Abstract: A system and method comprises depositing a dielectric layer on a substrate and depositing a metal layer on the dielectric layer. The system and method further includes depositing a high temperature diffusion barrier metal cap on the metal layer. The system and method further includes depositing a second dielectric layer on the high temperature diffusion barrier metal cap and the first dielectric layer, and etching a via into the second dielectric layer, such that the high temperature diffusion barrier metal cap is exposed. The system and method further includes depositing an under bump metallurgy in the via, and forming a C4 ball on the under bump metallurgy layer.

Abstract: Disclosed are microelectronic structures based on improved design and material combinations to provide improved current capabilities per I/O. The preferred embodiment of the invention uses a combination of one or more of the following: (1) Underbump metallurgy which enhances current per I/O by increasing via diameter or by having multiple via openings under BLM; (2) Thicker underbump metallurgy, where use of good conductor metallurgies can be used with increased thickness; (3) Utilizing larger via diameter under bump metallurgy, larger solder bump diameter and/or other current enhancing features for power and/or ground via connections; and (4) Using additives in Pb-free alloys to alter microstructure to minimize migration of atoms in the solder or at intermetallic transitions.

Abstract: An improved Land Grid Array interconnect structure is provided with the use of small metal bumps on the substrate electrical contact pad. The bumps interlock with segments of the fuzz button connection and increase the physical contact surface area between the contact pad and fuss button. The improved contact reduces displacement of electrical contact points due to thermo-mechanical stress and lowers the required actuation force during assembly.

Abstract: An improved Land Grid Array interconnect structure is provided with the use of small metal bumps on the substrate electrical contact pad. The bumps interlock with segments of the fuzz button connection and increase the physical contact surface area between the contact pad and fuzz button. The improved contact reduces displacement of electrical contact points due to thermo-mechanical stress and lowers the required actuation force during assembly.