Abstract: A method for manufacturing a poly- or microcrystalline silicon layer on an insulator comprises a silicon containing insulator, growing a thin adhesion promoting layer comprising amorphous silicon onto it and further growing a poly- or microcrystalline silicon layer onto the adhesion promoting layer. Such a sequence of layers, deposited with a PECVD method, shows good adhesion of the poly- or microcrystalline silicon on the base and is advantageous in the production of semiconductors, such as thin film transistors.

Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).

Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).

Abstract: A clock and data recovery circuit (CDR) for receiving high-speed digital data, and having an analog phase offset control capability, is improved by providing an adaptive sampling edge position control. A differential circuit samples the raw data signal at three closely spaced sampling points of the eye, and compares advanced and delayed sampled data with the nominal sampled data. If either the advanced or delayed sampled data differ from the nominal sampled data, i.e. if advanced or delayed errors are detected, a shift in the sampling edge position may be required. A logic circuit performs a method determining the occurrence of advanced or delayed errors over progressively longer time intervals, and to adjust the sampling edge position of the CDR by controlling the phase offset.

Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).

Abstract: A diffusion barrier system for a display device comprising a layer system with at least two layers of dielectric material, wherein at least two adjacent layers of that layer system comprise the same material. A respective method for manufacturing such a diffusion barrier system in a single process chamber of a plasma deposition system has the steps of introducing a substrate to be treated in said process chamber, discretely varying in a controlled manner during deposition at least one process parameter in the process chamber, without completely interrupting such process parameter, which results in layers with different properties and finally unloading said substrate from said process.

Abstract: A diffusion barrier system for a display device comprising a layer system with at least two layers of dielectric material, wherein at least two adjacent layers of that layer system comprise the same material. A respective method for manufacturing such a diffusion barrier system in a single process chamber of a plasma deposition system has the steps of introducing a substrate to be treated in said process chamber, discretely varying in a controlled manner during deposition at least one process parameter in the process chamber, without completely interrupting such process parameter, which results in layers with different properties and finally unloading said substrate from said process.

Abstract: A method for manufacturing a poly- or microcrystalline silicon layer on an insulator comprises a silicon containing insulator, growing a thin adhesion promoting layer comprising amorphous silicon onto it and further growing a poly- or microcrystalline silicon layer onto the adhesion promoting layer. Such a sequence of layers, deposited with a PECVD method, shows good adhesion of the poly- or microcrystalline silicon on the base and is advantageous in the production of semiconductors, such as thin film transistors.

Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).

Abstract: A diffusion barrier system for a display device comprising a layer system with at least two layers of dielectric material, wherein at least two adjacent layers of that layer system comprise the same material. A respective method for manufacturing such a diffusion barrier system in a single process chamber of a plasma deposition system has the steps of introducing a substrate to be treated in said process chamber, discretely varying in a controlled manner during deposition at least one process parameter in the process chamber, without completely interrupting such process parameter, which results in layers with different properties and finally unloading said substrate from said process.