Patents by Inventor Hai Wei
Hai Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240129523Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.Type: ApplicationFiled: December 19, 2023Publication date: April 18, 2024Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
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Patent number: 11961545Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.Type: GrantFiled: December 7, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Fa-Shen Jiang, Hsia-Wei Chen, Hsun-Chung Kuang, Hai-Dang Trinh, Cheng-Yuan Tsai
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Patent number: 11962804Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.Type: GrantFiled: July 12, 2021Date of Patent: April 16, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
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Publication number: 20240121429Abstract: An image coding method includes: deriving a candidate for a motion vector of a current block from a co-located motion vector; adding the candidate to a list; selecting the motion vector of the current block from the list; and coding the current block, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture.Type: ApplicationFiled: December 19, 2023Publication date: April 11, 2024Inventors: Viktor WAHADANIAH, Chong Soon LIM, Sue Mon Thet NAING, Hai Wei SUN, Takahiro NISHI, Hisao SASAI, Youji SHIBAHARA, Kyoko TANIKAWA, Toshiyasu SUGIO, Kengo TERADA, Toru MATSUNOBU
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Publication number: 20240121384Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.Type: ApplicationFiled: December 14, 2023Publication date: April 11, 2024Inventors: Jing Ya LI, Ru Ling Liao, Chong Soon Lim, Han Boon Teo, Hai Wei Sun, Che Wei Kuo, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
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Patent number: 11956440Abstract: An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; writing, into the sequence parameter set, reference list description defining information for defining a plurality of reference list descriptions corresponding to the buffer descriptions; and writing, into a first header of each processing unit which is included in a coded bitstream, buffer description selecting information for specifying a selected buffer description.Type: GrantFiled: November 15, 2022Date of Patent: April 9, 2024Assignee: SUN PATENT TRUSTInventors: Viktor Wahadaniah, Chong Soon Lim, Sue Mon Thet Naing, Hai Wei Sun, Takahiro Nishi, Hisao Sasai, Youji Shibahara, Toshiyasu Sugio, Kyoko Tanikawa, Toru Matsunobu, Kengo Terada
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Patent number: 11955561Abstract: A disclosed transistor structure includes a gate electrode, an active layer, a source electrode, a drain electrode, an insulating layer separating the gate electrode from the active layer, and a carrier modification device that reduces short channel effects by reducing carrier concentration variations in the active layer. The carrier modification device may include a capping layer in contact with the active layer that acts to increase a carrier concentration in the active layer. Alternatively, the carrier modification device may include a first injection layer in contact with the source electrode and the active layer separating the source electrode from the active layer, and a second injection layer in contact with the drain electrode and the active layer separating the drain electrode from the active layer. The first and second injection layers may act to reduce a carrier concentration within the active layer near the source electrode and the drain electrode.Type: GrantFiled: July 22, 2021Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Wu-Wei Tsai, Hai-Ching Chen
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Patent number: 11956467Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.Type: GrantFiled: September 8, 2021Date of Patent: April 9, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
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Publication number: 20240114134Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.Type: ApplicationFiled: December 5, 2023Publication date: April 4, 2024Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
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Publication number: 20240114136Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Takahiro NISHI, Tadamasa TOMA
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Publication number: 20240114160Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.Type: ApplicationFiled: December 7, 2023Publication date: April 4, 2024Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
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Publication number: 20240114129Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.Type: ApplicationFiled: December 5, 2023Publication date: April 4, 2024Inventors: Jing Ya LI, Chong Soon Lim, Han Boon Teo, Che Wei Kuo, Hai Wei Sun, Chu Tong Wang, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
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Publication number: 20240113222Abstract: Some embodiments relate to a thin film transistor comprising an active layer over a substrate. An insulator is stacked with the active layer. A gate electrode structure is stacked with the insulator and includes a gate material layer having a first work function and a first interfacial layer. The first interfacial layer is directly between the insulator and the gate material layer, wherein the gate electrode structure has a second work function that is different from the first work function.Type: ApplicationFiled: January 3, 2023Publication date: April 4, 2024Inventors: Yan-Yi Chen, Wu-Wei Tsai, Yu-Ming Hsiang, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
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Publication number: 20240113225Abstract: A semiconductor device includes a gate, a semiconductor structure, a gate insulating layer, a first source/drain feature and a second source/drain feature. The gate insulating layer is located between the gate and the semiconductor structure. The semiconductor structure includes at least one first metal oxide layer, a first oxide layer, and at least one second metal oxide layer. The first oxide layer is located between the first metal oxide layer and the second metal oxide layer. The first source/drain feature and the second source/drain feature are electrically connected with the semiconductor structure.Type: ApplicationFiled: January 10, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wu-Wei Tsai, Yan-Yi Chen, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
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Publication number: 20240114169Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.Type: ApplicationFiled: December 1, 2023Publication date: April 4, 2024Inventors: Jing Ya LI, Che Wei KUO, Chong Soon LIM, Chu Tong WANG, Han Boon TEO, Hai Wei SUN, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
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Patent number: 11949884Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.Type: GrantFiled: March 7, 2023Date of Patent: April 2, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
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Publication number: 20240107147Abstract: A camera module compensating for loss of focus caused by heat-deformation of a lens assembly above a photosensitive element includes the lens assembly, the photosensitive element, a circuit board, and a focusing assembly. The photosensitive element receives light through the lens assembly. The focusing assembly is arranged to apply deformation when temperature changes by moving the photosensitive element away from or toward the lens assembly, so correcting a focal length of the lens assembly on the photosensitive element. An electronic device is also disclosed.Type: ApplicationFiled: November 29, 2022Publication date: March 28, 2024Inventors: HAI-XIN JIN, ZHI-WEI LI
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Publication number: 20240102405Abstract: A method of encoding video including: writing a plurality of predetermined buffer descriptions into a sequence parameter set of a coded video bitstream; writing a plurality of updating parameters into a slice header of the coded video bitstream for selecting and modifying one buffer description out of the plurality of buffer descriptions; and encoding a slice into the coded video bitstream using the slice header and the modified buffer description.Type: ApplicationFiled: December 8, 2023Publication date: March 28, 2024Inventors: Viktor WAHADANIAH, Chong Soon LIM, Sue Mon Thet NAING, Hai Wei SUN, Takahiro NISHI, Hisao SASAI, Youji SHIBAHARA, Toshiyasu SUGIO, Kyoko TANIKAWA, Toru MATSUNOBU
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Publication number: 20240089479Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
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Publication number: 20240089493Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI