Abstract: A method for improving the fault coverage of functional tests for integrated circuits by establishing a design-specific low voltage functional screening procedure. In the disclosed embodiment of the invention, a reduced voltage test threshold is established by comparing the results of an iterative test procedure executed on a set of known good integrated circuits and integrated circuits which have passed traditional functional test programs but manifested problems in the field. For a given device under test, the iterative procedure commences by applying a system clock and nominal power supply voltage. A set of functional test vectors is then executed on the device using automated test equipment (ATE). The results are compared with expected test results to determine if the device is a passing device under the initial test conditions. If so, the power supply voltage is decremented by a predetermined value and the test process is repeated.