Patents by Inventor Haidang LIN
Haidang LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11706060Abstract: A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.Type: GrantFiled: August 30, 2021Date of Patent: July 18, 2023Assignee: Rambus Inc.Inventors: Haidang Lin, Charles Walter Boecker, Masum Hossain
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Patent number: 11675222Abstract: Magneto-optical modulator-based systems and devices for transferring quantum information are described. Such systems can be used for many applications, including as part of quantum computers. An example system includes a quantum information system configured to provide a signal corresponding to at least one qubit. The system further includes a magneto-optical driver configured to receive the signal corresponding to the at least one qubit and process the signal to generate a current based on the signal corresponding to the at least one qubit. The system further includes a magneto-optical modulator configured to receive the current from the magneto-optical driver and provide a modulated light output by modulating a received light input based on the current.Type: GrantFiled: January 28, 2021Date of Patent: June 13, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Foteini Karinou, Winston Allen Saunders, Haidang Lin, Richard P. Rouse, Derek Leslie Knee, Charles Walter Boecker, Marijn Petrus Gerardus Rombouts
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Publication number: 20220236593Abstract: Magneto-optical modulator-based systems and devices for transferring quantum information are described. Such systems can be used for many applications, including as part of quantum computers. An example system includes a quantum information system configured to provide a signal corresponding to at least one qubit. The system further includes a magneto-optical driver configured to receive the signal corresponding to the at least one qubit and process the signal to generate a current based on the signal corresponding to the at least one qubit. The system further includes a magneto-optical modulator configured to receive the current from the magneto-optical driver and provide a modulated light output by modulating a received light input based on the current.Type: ApplicationFiled: January 28, 2021Publication date: July 28, 2022Inventors: Foteini KARINOU, Winston Allen SAUNDERS, Haidang LIN, Richard P. ROUSE, Derek Leslie KNEE, Charles Walter BOECKER, Marijn Petrus Gerardus ROMBOUTS
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Publication number: 20220045885Abstract: A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.Type: ApplicationFiled: August 30, 2021Publication date: February 10, 2022Inventors: Haidang Lin, Charles Walter Boecker, Masum Hossain
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Patent number: 11128499Abstract: A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.Type: GrantFiled: March 25, 2019Date of Patent: September 21, 2021Assignee: Rambus Inc.Inventors: Haidang Lin, Charles Walter Boecker, Masum Hossain
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Publication number: 20210058278Abstract: A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.Type: ApplicationFiled: March 25, 2019Publication date: February 25, 2021Inventors: Haidang Lin, Charles Walter Boecker, Masum Hossain
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Patent number: 10374842Abstract: The present invention relates to data communication techniques and integrated circuit devices. More specifically, embodiments of the present invention provide an input buffer module that utilizes one or more equalization elements. The input buffer module includes an array of inverters arranged in a series. An equalization element is configured in series relative to a segment of the array of inverters. The resistance value of the equalization element is predetermined based on a delay associated with the segment of the array of inverters. There are other embodiments as well.Type: GrantFiled: December 6, 2018Date of Patent: August 6, 2019Assignee: INPHI CORPORATIONInventors: Karim Abdelhalim, Michael Le, Haidang Lin
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Publication number: 20190190748Abstract: The present invention relates to data communication techniques and integrated circuit devices. More specifically, embodiments of the present invention provide an input buffer module that utilizes one or more equalization elements. The input buffer module includes an array of inverters arranged in a series. An equalization element is configured in series relative to a segment of the array of inverters. The resistance value of the equalization element is predetermined based on a delay associated with the segment of the array of inverters. There are other embodiments as well.Type: ApplicationFiled: December 6, 2018Publication date: June 20, 2019Inventors: Karim ABDELHALIM, Michael LE, Haidang LIN
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Patent number: 10320370Abstract: Methods and circuits for analyzing a signal and adjusting parameters of an equalizer for a signal. The signal is received at a receiver over a channel wherein the signal has a wave form. The signal is equalized at an equalizer using an adjustable parameter for the equalization. Data points from the signal are sampled between upper and lower limits of a threshold at an error sampler. A performance metric of the signal is computed based on a statistical density of the data points from the signal between the upper and lower limits of the threshold.Type: GrantFiled: December 27, 2012Date of Patent: June 11, 2019Assignee: MoSys, Inc.Inventors: Prashant Choudhary, Haidang Lin, Alvin Wang, Saman Behtash, Shaishav Desai
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Patent number: 10187230Abstract: The present invention relates to data communication techniques and integrated circuit devices. More specifically, embodiments of the present invention provide an input buffer module that utilizes one or more equalization elements. The input buffer module includes an array of inverters arranged in a series. An equalization element is configured in series relative to a segment of the array of inverters. The resistance value of the equalization element is predetermined based on a delay associated with the segment of the array of inverters. There are other embodiments as well.Type: GrantFiled: September 8, 2017Date of Patent: January 22, 2019Assignee: INPHI CORPORATIONInventors: Karim Abdelhalim, Michael Le, Haidang Lin
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Patent number: 9065399Abstract: A voltage-mode differential driver is disclosed. The differential driver includes two driver arms, each driver arm including a variable-impedance driver for driving a single-ended output signal. Each variable-impedance driver comprises multiple driver slices, where each driver slice includes a pre-driver circuit and a driver circuit. Advantageously, it has been determined that the disclosed voltage-mode driver design requires less power than conventional current-mode drivers. In one implementation, the disclosed voltage-mode driver design provides the capability of independently programming the delay of the two single-ended outputs so as to compensate for differential skew. Other embodiments and features are also disclosed.Type: GrantFiled: June 14, 2013Date of Patent: June 23, 2015Assignee: Altera CorporationInventors: Bonnie I. Wang, Weiqi Ding, Tim Tri Hoang, Richard Hernandez, Haidang Lin
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Publication number: 20140368272Abstract: A voltage-mode differential driver is disclosed. The differential driver includes two driver arms, each driver arm including a variable-impedance driver for driving a single-ended output signal. Each variable-impedance driver comprises multiple driver slices, where each driver slice includes a pre-driver circuit and a driver circuit. Advantageously, it has been determined that the disclosed voltage-mode driver design requires less power than conventional current-mode drivers. In one implementation, the disclosed voltage-mode driver design provides the capability of independently programming the delay of the two single-ended outputs so as to compensate for differential skew. Other embodiments and features are also disclosed.Type: ApplicationFiled: June 14, 2013Publication date: December 18, 2014Inventors: Bonnie I. WANG, Weiqi DING, Tim Tri HOANG, Richard HERNANDEZ, Haidang LIN