Abstract: An interconnect structure, an interconnect structure for interconnecting first and second components, an interconnect structure for interconnecting a multiple component stack and a substrate, and a method of fabricating an interconnect structure. The interconnect structure comprising a base portion formed on a mounting surface of a first component; a pillar portion extending from the base portion and substantially perpendicularly to the mounting surface; and a head portion formed on the pillar portion and having larger lateral dimensions than the pillar portion; wherein the base portion and the pillar portion are integrally formed of a homogeneous material.

Abstract: An interconnect structure, an interconnect structure for interconnecting first and second components, an interconnect structure for interconnecting a multiple component stack and a substrate, and a method of fabricating an interconnect structure. The interconnect structure comprising a base portion formed on a mounting surface of a first component; a pillar portion extending from the base portion and substantially perpendicularly to the mounting surface; and a head portion formed on the pillar portion and having larger lateral dimensions than the pillar portion; wherein the base portion and the pillar portion are integrally formed of a homogeneous material.

Abstract: A process is used to produce copper bumps on a semiconductor chip or a wafer containing several microchips. The chip or wafer has a layer incorporating a plurality semiconductor devices and a passivation layer having openings. Conductive pads within the openings and are in contact with the semiconductor devices. In the process, a conductive adhesive material is deposited onto the conductive pads to form adhesion layers. A conductive metal is deposited onto the adhesion layers to form barrier layers and the passivation layer is subjected to an acid dip solution to remove particles of the conductive adhesive material which can be attached to the passivation layer. Copper is then deposited onto the barrier layers to form the copper bump. Each one of the deposition steps are performed electrolessly. Furthermore, plating solutions and a wafer and a microchip produced by the above process and are provided.