Abstract: Provided is display panel. The display panel has a display region, an aperture region, and a peripheral region, the peripheral region being disposed around the aperture region, and the display region surrounding the peripheral region; wherein the display panel comprises: a substrate, disposed within the display region and the peripheral region; an inorganic insulating layer, disposed on a side of the substrate, and extending from the display region to the peripheral region; a plurality of conductive isolation pillars; an insulative isolation layer; an organic material layer; and a first electrode, disposed on a side, away from the substrate, of the organic material layer and extending from the display region to the peripheral region.

Abstract: A pixel circuit includes a driving circuit, a first light emitting control circuit and a light emitting element; a first terminal of the driving circuit is electrically connected to a second node, a second terminal of the driving circuit is electrically connected to a first voltage line, and the driving circuit is configured to control to generate a driving current under the control of a potential of the first node; the first light emitting control circuit is configured to control to connect or disconnect the first electrode of the light emitting element and the second voltage line under the control of the first light emitting control signal; or, the first light emitting control circuit is configured to control to connect or disconnect the second electrode of the light emitting element and the second node under the control of the first light emitting control signal.

Abstract: A driving circuit, a driving method and a display apparatus. The driving circuit comprises a first node control circuit, a first control circuit, a second control circuit, an output node control circuit, a first energy storage circuit and an output circuit; the first control circuit controls the connection or disconnection between a second node and a first voltage line under the control of a setting control signal; the second control circuit controls the connection or disconnection between the second node and a second voltage line under the control of a first clock signal and a potential of the second node; and the output node control circuit controls the connection or disconnection between the second node and a first output node under the control of the first clock signal.

Abstract: A display panel and a display device are provided. The display panel includes a pixel driving circuit on a side of a substrate. The pixel driving circuit includes a drivier transistor; a ninth transistor with a first electrode being connected to a third initial signal line, and a second electrode being connected to a first electrode of the driver transistor; an eighth transistor with a first electrode being connected to a gate of the driver transistor; a first transistor with a first electrode being connected to a first initial signal line, and a second electrode being connected to a second electrode of the eighth transistor; and a second transistor with a first electrode being connected to the second electrode of the eighth transistor, and a second electrode being connected to a second electrode of the driver transistor.

Abstract: A driving circuit, a driving method, a pixel circuit, a display panel and a display device are provided. The driving circuit includes a first switching circuit and a scanning signal generation circuit. The first switching circuit writes a data signal provided by a data output end into the scanning signal generation circuit under the control of a first gating control signal. The scanning signal generation circuit generates a scanning signal in accordance with the data signal, and outputs the scanning signal through a scanning signal output end.

Abstract: A driving circuit, a driving method, a driving module, and a display device are provided. The driving circuit includes a first output circuit, a second output circuit, and a first output node control circuit. The first output circuit controls a driving signal output end to be electrically connected to or electrically disconnected from a first voltage end under the control of a potential of a first output node. The second output circuit controls the driving signal output end to be electrically connected to or electrically disconnected from an output signal end under the control of a potential of a second output node. The first output node control circuit controls the first output node to be electrically connected to or electrically disconnected from a second voltage end under the control of a first output control signal.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, a conductive structure and a first inorganic layer on the base substrate. The base substrate includes a first region and a second region; the conductive structure is in the first region and the second region; the first inorganic layer is on a side of the conductive structure away from the base substrate and in the first region and the second region. In at least a part of the first region, an insulating layer is disposed between the first inorganic layer and the conductive structure, and in at least a part of the second region, the first inorganic layer is in contact with a surface of the conductive structure.

Abstract: A display panel, includes: a base substrate; a plurality of first initial signal lines, wherein orthographic projections of the first initial signal lines on the base substrate extend along a first direction and are spaced apart along a second direction, and the first direction intersects with the second direction; a plurality of second initial signal lines, located in a same conductive layer as the first initial signal lines, wherein orthographic projections of the second initial signal lines on the base substrate extend along the first direction and are spaced apart along the second direction; a plurality of first initial connection lines; and a plurality of second initial connection lines.

Abstract: A shift register, a gate driving circuit, and a driving method for a shift register. The shift register comprises: a cascade output sub-circuit, an output control sub-circuit, and a scanning output sub-circuit, wherein the cascade output sub-circuit is configured to provide a signal of a first power supply end or a second power supply end to a cascade output end under the control of signals of an input end, a first clock signal end, a second clock signal end, a first node, a second node and a third node; the output control sub-circuit is configured to provide the signal of the first node to a fourth node and the signal of the second node to a fifth node under the control of signals of the first node, the third node and a first control signal end to a third control signal end.

Abstract: A display panel includes pixel circuits. The pixel circuit includes a first light-emitting control unit between first and second nodes, a second light-emitting control unit between third and fourth nodes, a driving unit to the second, third and fifth nodes, a first data writing unit between the third and sixth nodes, an isolation unit between the fifth and sixth nodes, and a light-emitting unit. The first node receives a first driving signal. The first data writing unit includes an oxide transistor. The isolation unit includes a polysilicon transistor. One end of the light-emitting unit is electrically connected to the fourth node, and the other end receives a second driving signal. There is a first time period in which the first data writing unit and the isolation unit are both turned on, and after that time period, the isolation unit is turned off before the first data writing unit.

Abstract: Provided is a display panel. The display panel has a display region, and includes: a base substrate; and a plurality of pixel circuits arrayed on a side of the base substrate, wherein the plurality of pixel circuits include a plurality of first pixel circuits and a plurality of dummy pixel circuits; a plurality of light-emitting devices on a side of the plurality of pixel circuits away from the base substrate, wherein the plurality of light-emitting devices are electrically connected to the plurality of first pixel circuits in one-to-one correspondence; and a plurality of data signal lines and a plurality of redundant signal lines that are disposed in the display region, wherein an extension direction of the plurality of data signal lines is coincident with an extension direction of the plurality of redundant signal lines.

Abstract: A display apparatus includes a display panel, a touch layer, and a flexible printed circuit (FPC) including a main FPC and a bridge FPC. A third soldering region and a fourth soldering region of the bridge FPC are respectively soldered to a first soldering region and a second soldering region of the main FPC. Ends of each first touch connection line are electrically connected to a touch chip and a first touch lead. Ends of each second touch connection line are electrically connected to a pad on the second soldering region and a second touch lead. Ends of each third touch connection line are electrically connected to a pad on the first soldering region and the touch chip. Ends of each touch transfer line are electrically connected to a pad on the third soldering region and a pad on the fourth soldering region.

Abstract: Disclosed is a display substrate including a base substrate (10) and a gate drive circuit disposed on the base substrate (10), wherein the gate drive circuit includes a plurality of shift register circuits (GOA) cascaded, a shift register circuit (GOA) includes a plurality of NOT gate circuits, a NOT gate circuit includes a first control transistor and a second control transistor, and transistor types of the first control transistor and the second control transistor are different. Arrangement modes of transistors of at least two NOT gate circuits among the plurality of NOT gate circuits of the shift register circuit (GOA) are different.

Abstract: A display substrate and a display device are provided. The display substrate includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. Each sub-pixel includes a light-emitting region. Sides of each light-emitting region or extension lines of the sides are sequentially connected to form a polygon. Vertexes of the polygon of at least a part of the sub-pixels have non-overlapped regions with angle portions of the corresponding light-emitting regions. Corners of the light-emitting region of at least one sub-pixel at least include a first angle portion. An area of a non-overlapped region between the first angle portion and a vertex angle of the polygon corresponding to the first angle portion is greater than an area of a non-overlapped region between each angle portion among at least part of remaining angle portions and a vertex angle of the polygon corresponding to the each angle portion.

Abstract: Disclosed are a display substrate and a drive method therefor, and a display apparatus. The display substrate includes a plurality of circuit units, and at least one circuit unit includes, at least, a pixel drive circuit and a light emitting signal line. In at least one circuit unit, a pixel drive circuit includes at least a third transistor, a fifth transistor, and a sixth transistor, a second electrode of the fifth transistor is connected with a first electrode of the third transistor, and a first electrode of the sixth transistor is connected with a second electrode of the third transistor. In at least one pixel drive circuit of at least one unit row, a fifth transistor is connected with a light emitting signal line in a previous unit row, and a sixth transistor is connected with a light emitting signal line in a current unit row.

Abstract: A display substrate and a display device are provided. The display substrate includes a pixel driving circuit, the pixel driving circuit includes a first storage capacitor, a second storage capacitor, at least one shield electrode, and at least one double-gate structured transistor; the first storage capacitor at least includes a first electrode plate (71) and a third electrode plate (73), and an orthographic projection of the first electrode plate (71) on the base substrate at least partially overlaps with an orthographic projection of the third electrode plate (73) on the base substrate; the second storage capacitor at least includes a second electrode plate (72) and a fourth electrode plate (74), and an orthographic projection of the second electrode plate (72) on the base substrate at least partially overlaps with an orthographic projection of the fourth electrode plate (74) on the base substrate.

Abstract: A driving circuit includes a first output node control circuit, an output reset circuit, a second output node control circuit, an output circuit, a first energy storage circuit, a second energy storage circuit, and a driving signal output terminal; the output reset circuit controls to connect the driving signal output terminal and the first voltage line under the control of the potential of the first output node; the output circuit controls to connect the driving signal output terminal and the second voltage line under the control of the potential of the second output node; the first energy storage circuit is electrically connected to the first output node and the driving signal output terminal respectively, and the second energy storage circuit is electrically connected to the second output node and the second voltage line respectively, and the first/second energy storage circuit are configured to store electric energy.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, a first active layer on a side of the base substrate, and a third conductive layer on a side of the first active layer away from the base substrate. The first active layer includes active portions spaced apart, wherein each active portion includes a sub-active portion and a via-hole connection portion connected to each other, and the sub-active portion is disposed corresponding to a transistor of two or more transistors, and configured to form a channel region of the corresponding transistor. The third conductive layer includes at least one bridge portion, wherein the at least one bridge portion is connected to via-hole connection portions in different active portions through via holes, respectively. A sheet resistance of the third conductive layer is less than a sheet resistance of the via hole connection portion.

Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel drive circuit and a plurality of scan signal lines connected to the pixel drive circuit, the pixel drive circuit at least includes a plurality of transistors; in the direction perpendicular to the display substrate, the display substrate at least includes a first gate metal layer (GATE 1) arranged on the substrate (101) and a first source drain metal layer (SD1) arranged on a side of the first gate metal layer (GATE 1) away from the substrate (101), a gate electrode of at least one transistor is arranged in the first gate metal layer (GATE 1).

Abstract: A display substrate includes multiple circuit units, a first power supply connection line, a second power supply connection line, a first power supply line, and a second power supply line, a circuit unit includes a pixel drive circuit, the first power supply line is connected to the pixel drive circuit, and is connected to the first power supply connection line, and the second power supply line is connected to the second power supply connection line; the pixel drive circuit includes a first shielding electrode and at least one transistor with a double-gate structure, an orthographic projection of the first shielding electrode on the base substrate is at least partially overlapped with that of a node between two gate electrodes of a transistor with the double-gate structure on the base substrate; the first shielding electrode is connected to a first power supply connection line or a second power supply connection line.