Abstract: Techniques are described for determining whether execution of an instruction would require reading more values from a memory cell of a general purpose register (GPR) than a read port of the memory cell would allow. In such a case, the techniques may store, prior to execution of the instruction, one or more values from the memory cell in a separate conflict queue. During execution of the instruction to implement an operation defined by the instruction, one value that is an operand of the operation would be read from the memory cell and another value that is an operand of the operation other would be read from the conflict queue.

Abstract: Techniques are described for determining whether execution of an instruction would require reading more values from a memory cell of a general purpose register (GPR) than a read port of the memory cell would allow. In such a case, the techniques may store, prior to execution of the instruction, one or more values from the memory cell in a separate conflict queue. During execution of the instruction to implement an operation defined by the instruction, one value that is an operand of the operation would be read from the memory cell and another value that is an operand of the operation other would be read from the conflict queue.

Abstract: In a particular embodiment, a single step increment calculation module is responsive to a first ramp control value and a second ramp control value. The single step increment calculation module generates a single step frequency adjustment as an output. The generated single step frequency adjustment is applied to a system clock signal having a first frequency to change the system clock signal to a second clock signal having a second frequency. The first frequency is different from the second frequency and the system clock signal has a first duty cycle that is within a tolerance range of a second duty cycle of the second clock signal.

Abstract: In a particular embodiment, a single step increment calculation module is responsive to a first ramp control value and a second ramp control value. The single step increment calculation module generates a single step frequency adjustment as an output. The generated single step frequency adjustment is applied to a system clock signal having a first frequency to change the system clock signal to a second clock signal having a second frequency. The first frequency is different from the second frequency and the system clock signal has a first duty cycle that is within a tolerance range of a second duty cycle of the second clock signal.