Patents by Inventor Hailong Zhou

Hailong Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240332031
    Abstract: A method and system for etching high aspect ratio structures in a semiconducting processing chamber are disclosed herein. In one example, a method of patterning a substrate comprises etching the substrate to form a recess, depositing a passivation layer on sidewalls of the recess, treating the passivation layer, and etching the recess to a second depth. The substrate etch forms a recess to a first depth, the substrate having a mask layer disposed thereon. The treating of the passivation layer is for removal of a clogging material formed from an etch byproduct on the mask layer. The etching the recess to a second depth while maintaining a minimum variation of a recess sidewall width.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Feng QIAO, Hailong ZHOU, Qian FU, Sangjun PARK, Jayoung CHOI, Radhe AGARWAL, Tong LIU
  • Publication number: 20240266180
    Abstract: A method includes performing a dry etch process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etch process forms a passivation layer including a byproduct on surfaces of the second material. A amount of first material of the portion of the first layer remains after performing the dry etch process, The method further includes introducing a halide gas to enhance the passivation layer on the surfaces of the second material.
    Type: Application
    Filed: February 1, 2024
    Publication date: August 8, 2024
    Inventors: David Knapp, Feng Qiao, Hailong Zhou, Junkai He, Qian Fu, Mark J. Saly, Jeffrey Anthis, Jayoung Choi
  • Publication number: 20240096641
    Abstract: Exemplary methods of semiconductor processing may include etching a first portion of a feature in a substrate disposed within a processing region of a semiconductor processing chamber. The first portion of the feature may at least partially extend through one or more layers of material formed on the substrate. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the carbon-containing precursor. The methods may include contacting the substrate with the plasma effluents of the carbon-containing precursor. The methods may include forming a carbon-containing material on the substrate. The carbon-containing material may line the first portion of the feature at least partially extending through the one or more layers of material formed on the substrate. The carbon-containing material may be formed in the same chamber where the feature is etched.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Hailong Zhou, Iljo Kwak, Olivier P. Joubert, Yu Wen
  • Patent number: 11495470
    Abstract: Embodiments of this disclosure include a method of processing a substrate that includes etching a first dielectric material formed on a substrate that is disposed on a substrate supporting surface of a substrate support assembly disposed within a processing region of a plasma processing chamber. The etching process may include delivering a process gas to the processing region, wherein the process gas comprises a first fluorocarbon containing gas and a first process gas, delivering, by use of a radio frequency generator, a radio frequency signal to a first electrode to form a plasma in the processing region, and establishing, by use of a first pulsed-voltage waveform generator, a first pulsed voltage waveform at a biasing electrode disposed within the substrate support assembly.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 8, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Hailong Zhou, Sean Kang, Kenji Takeshita, Rajinder Dhindsa, Taehwan Lee, Iljo Kwak
  • Publication number: 20220336222
    Abstract: Embodiments of this disclosure include a method of processing a substrate that includes etching a first dielectric material formed on a substrate that is disposed on a substrate supporting surface of a substrate support assembly disposed within a processing region of a plasma processing chamber. The etching process may include delivering a process gas to the processing region, wherein the process gas comprises a first fluorocarbon containing gas and a first process gas, delivering, by use of a radio frequency generator, a radio frequency signal to a first electrode to form a plasma in the processing region, and establishing, by use of a first pulsed-voltage waveform generator, a first pulsed voltage waveform at a biasing electrode disposed within the substrate support assembly.
    Type: Application
    Filed: April 29, 2021
    Publication date: October 20, 2022
    Inventors: Hailong ZHOU, Sean KANG, Kenji TAKESHITA, Rajinder DHINDSA, Taehwan LEE, Iljo KWAK
  • Publication number: 20220197064
    Abstract: The present invention belongs to the field of integrated optical waveguide modulation, and specifically, relates to an ultra-close-range metallic heater thermo-optic phase shifter, which includes: a substrate, and a metallic heater and an optical waveguide respectively arranged on the substrate; in which the metallic heater and the optical waveguide are arranged at a close distance, and the distance is less than 600 nm. The material of the metallic heater is titanium, titanium nitride, aluminum, gold, and/or a metal with a larger imaginary part of the refractive index. The present invention includes two solutions: side heating and top surface heating.
    Type: Application
    Filed: August 6, 2021
    Publication date: June 23, 2022
    Inventors: Janji Dong, Yanxian Wei, Hailong Zhou, Xinliang Zhang
  • Patent number: 11355543
    Abstract: A packaging unit, a component packaging structure and a preparation method thereof. The packaging unit includes a bonding substrate and spacers formed on the bonding substrate through a patterning process, wherein the bonding substrate is reserved with packaging regions for applying sealant. When the packaging unit is used to package a component, because the spacer(s) is supported between the bonding substrate and the base substrate, the packaging unit is easy to separate from the base substrate At the same time, the packaging unit has little or no damage to the base substrate and elements formed on the base substrate, thus effectively protecting the performance of the base substrate and the elements on the base substrate.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: June 7, 2022
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tingze Dong, Yan Yang, Hailong Zhou, Xian Li, Limin Tian
  • Publication number: 20210273001
    Abstract: A packaging unit, a component packaging structure and a preparation method thereof. The packaging unit includes a bonding substrate and spacers formed on the bonding substrate through a patterning process, wherein the bonding substrate is reserved with packaging regions for applying sealant. When the packaging unit is used to package a component, because the spacer(s) is supported between the bonding substrate and the base substrate, the packaging unit is easy to separate from the base substrate At the same time, the packaging unit has little or no damage to the base substrate and elements formed on the base substrate, thus effectively protecting the performance of the base substrate and the elements on the base substrate.
    Type: Application
    Filed: March 28, 2018
    Publication date: September 2, 2021
    Inventors: Tingze DONG, Yan YANG, Hailong ZHOU, Xian LI, Limin TIAN
  • Patent number: 10867795
    Abstract: A method of etching a hardmask layer formed on a substrate is provided. The method includes supplying an etching gas mixture to a processing region of a processing chamber. A device is disposed in the processing region when the etching gas mixture is supplied to the processing region. The device comprises a substrate and a hardmask layer formed over the substrate. The etching gas mixture comprises a fluorine-containing gas, a silicon-containing gas, and an oxygen-containing gas. The method further includes providing RF power to the etching gas mixture to form a plasma in the processing region. The plasma is configured to etch exposed portions of the hardmask layer.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: December 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Nancy Fung, Gene Lee, Hailong Zhou, Zohreh Hesabi, Akhil Mehrotra, Shan Jiang, Abhijit Patil, Chi-I Lang, Larry Gao
  • Patent number: 10497567
    Abstract: Implementations described herein generally relate to an etching process for etching materials with high selectivity. In one implementation, a method of etching a gate material to form features in the gate material is provided. The method includes (a) exposing a cobalt mask layer to a fluorine-containing gas mixture in a first mode to form a passivation film on the cobalt mask layer. The cobalt mask layer exposes a portion of a gate material disposed on a substrate. The method further comprises (b) exposing the portion of the gate material to an etching gas mixture in a second mode to etch the portion of the gate material. The portion of the gate material is etched through openings defined in the cobalt mask layer and the portion of the gate material is etched at a greater rate than the cobalt mask layer having the passivation layer disposed thereon.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: December 3, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Hailong Zhou, Yangchung Lee, Chain Lee, Hui Sun, Jonathan Sungehul Kim
  • Patent number: D944763
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: March 1, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D944764
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: March 1, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D944766
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: March 1, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D944767
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: March 1, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D944768
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: March 1, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D947153
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: March 29, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D947809
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: April 5, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D954021
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: June 7, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D956011
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: June 28, 2022
    Inventors: Ding He, Zhi Liu, Jinying Zhao, Hailong Zhou
  • Patent number: D1004571
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: November 14, 2023
    Assignee: Shenzhen Thousandshores Technology Co., Ltd.
    Inventors: Ding He, Zhi Liu, Hailong Zhou