Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in concentric ring circles enclosed several horizontal P-N junctions in concentric ring circles. In another embodiment, an enclosed deep trench in ring circle surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. This structure can be extended to multiple deep trenches with associated horizontal P-N junctions.

Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, an enclosed deep trench in ring shape surrounds a vertical MOS structure plus a shallow trench gate in the center to create a device with very high breakdown voltage and very low leakage current. This structure is extended to multiple deep trenches and shallow trenches alternating each other.

Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in concentric ring circles enclosed several horizontal P-N junctions in concentric ring circles. In another embodiment, an enclosed deep trench in ring circle surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. This structure can be extended to multiple deep trenches with associated horizontal P-N junctions.

Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, an enclosed deep trench in ring shape surrounds a vertical MOS structure plus a shallow trench gate in the center to create a device with very high breakdown voltage and very low leakage current. This structure is extended to multiple deep trenches and shallow trenches alternating each other.

Abstract: Methods for manufacturing a MOSFET device for high voltage application are disclosed to solve less-than-90-degree trench angle problem. In one embodiment, the trenches in a MOSFET device are filled with different concentrations of P? epitaxial material at different stages to improve charge balance. In an alternative embodiment, several N? epitaxial layers with different concentrations are created before etching trenches filled with P? epitaxial material. Yet in another embodiment, a reverse deep trench process creates a P? epitaxial layer first, and etches trenches to be filled with N? epitaxial and act as active region during device operation, leaving the remaining P? epitaxial columns as non-active regions. The final device structure of the remaining P? epitaxial columns is similar to the traditional P? epitaxial trenches.

Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in ring shape enclosed a vertical P-N junction. For each deep trench, a corresponding wider ring-shape P+ region is created on top of a N? epi layer. This enclosed deep trench surrounding a vertical P-N junction and a thinner N? epitaxial layer allow higher reverse bias voltage and low leakage current. In another embodiment, an enclosed deep trench in ring shape surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. The structure can be extended to multiple deep trenches with associated horizontal P-N junctions.

Abstract: Methods for manufacturing a MOSFET device for high voltage application are disclosed to solve less-than-90-degree trench angle problem. In one embodiment, the trenches in a MOSFET device are filled with different concentrations of P? epitaxial material at different stages to improve charge balance. In an alternative embodiment, several N? epitaxial layers with different concentrations are created before etching trenches filled with P? epitaxial material. Yet in another embodiment, a reverse deep trench process creates a P? epitaxial layer first, and etches wider conductive regions to be filled with N? epitaxial later, leaving the remaining P? epitaxial columns as non-conductive regions similar to the traditional P? epitaxial trenches.

Abstract: Apparatus, methods and other embodiments associated with a high speed and high breakdown voltage Schottky rectifier are disclosed. In one embodiment, the Schottky rectifier has three layers of N-type semiconductor, a first layer of highly doped N-type substrate at the bottom, a second layer of lightly doped epitaxial N-type material above the first layer, and a third layer of very low doping concentration N-type material created by converting the top shallow portion of the second layer without turning into P-type. The Schottky device further includes an enclosed deep trench structure close to the bottom of the second layer and can sustain high reverse bias voltage up to 2,000 volt.

Abstract: Apparatus and other embodiments associated with high speed and high breakdown voltage rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in ring shape enclosed a vertical P-N junction. For each deep trench, a corresponding wider ring-shape P+ region is created on top of a N? epi layer. This enclosed deep trench surrounding a vertical P-N junction and a thinner N? epitaxial layer allow higher reverse bias voltage and low leakage current. In another embodiment, an enclosed deep trench in ring shape surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. The structure can be extended to multiple deep trenches with associated horizontal P-N junctions.

Abstract: Apparatus, methods and other embodiments associated with a high speed and high breakdown voltage Schottky rectifier are disclosed. In one embodiment, the Schottky rectifier has three layers of N-type semiconductor, a first layer of highly doped N-type substrate at the bottom, a second layer of lightly doped epitaxial N-type material above the first layer, and a third layer of very low doping concentration N-type material created by converting the top shallow portion of the second layer without turning into P-type. The Schottky device further includes an enclosed deep trench structure close to the bottom of the second layer and can sustain high reverse bias voltage up to 2,000 volt.

Abstract: In one embodiment, the present invention includes an apparatus having a metal layer with a pad disposed above a substrate; and a cap disposed above the metal layer having a first portion to provide for contact with a probe and a second portion to provide a bonding surface, and the cap is electrically coupled to the pad.

Abstract: In one embodiment, the present invention includes an apparatus having a metal layer with a pad disposed above a substrate; and a cap disposed above the metal layer having a first portion to provide for contact with a probe and a second portion to provide a bonding surface, and the cap is electrically coupled to the pad.

Abstract: In one embodiment, the present invention includes an apparatus having a metal layer with a pad disposed above a substrate; and a cap disposed above the metal layer having a first portion to provide for contact with a probe and a second portion to provide a bonding surface, and the cap is electrically coupled to the pad.

Abstract: Methods of forming a semiconductor substrate and a device oriented substantially along a crystal direction other than a crystal direction that falls along a cleavage plane and the substrate and device formed by each method are disclosed. An ingot of monocrystalline material is formed and marked to denote a crystal direction other than a crystal direction that falls along a cleavage plane. The ingot is lapped to form a semiconductor substrate having a mark denoting a crystal direction other than a crystal direction that falls along a cleavage plane. A device is formed on the semiconductor substrate having a monocrystalline layer, such that a field oxide-active area edge or a gate electrode lies substantially along a crystal direction other than a crystal direction that falls along a cleavage plane. The present invention may be used on any device where dislocation defects, a lateral diffusion, or a lateral oxidation is to be minimized.