Patents by Inventor Haiwei Lu

Haiwei Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250383513
    Abstract: Optical fibers are disposed within v-grooves of an optical fiber attachment region of a photonic integrated chip (PIC). A structural adhesive is disposed over a first portion of the optical fibers within the optical fiber attachment region of the PIC without being disposed over a second portion of the optical fibers within the optical fiber attachment region of the PIC. An optical index matching adhesive is disposed over the second portion of the optical fibers within the optical fiber attachment region of the PIC. A buffer structure is disposed on the structural adhesive and the optical index matching adhesive as they are cured. The buffer structure is removed. The optical fibers, the structural adhesive, and the optical index matching adhesive have a collective vertical height above a top surface of the PIC that is less than a vertical height of flip-chip attachment structures on the top surface of the PIC.
    Type: Application
    Filed: June 12, 2025
    Publication date: December 18, 2025
    Inventors: Li-Fan Yang, Albert Zettler Greely, JR., Chong Zhang, Haiwei Lu, Rui Li, Lijuan Chen, Ken Jian Ming Wang
  • Publication number: 20250154517
    Abstract: The current disclosure relates to a split-intein-based gene-stacking system through split-selectable-marker-enabled co-transformation in Arabidopsis thaliana and poplar. The disclosure is also directed to methods of co-transforming plant cells, comprising delivering DNA vectors into a plant cell.
    Type: Application
    Filed: September 20, 2024
    Publication date: May 15, 2025
    Inventors: Xiaohan Yang, Md Mahmudul Hassan, Haiwei Lu, Gerald A. Tuskan, Guoliang Yuan
  • Publication number: 20250044534
    Abstract: An electro-optical chip assembly includes a silicon baseplate and an electro-optical chip. The electro-optical chip has a silicon substrate that is fusion bonded to the silicon baseplate. The electro-optical chip is manufactured separate from the silicon baseplate before fusion bonding of the silicon substrate of the electro-optical chip to the silicon baseplate.
    Type: Application
    Filed: October 12, 2023
    Publication date: February 6, 2025
    Inventors: Chong Zhang, Haiwei Lu, Steve Groothuis
  • Patent number: 12019269
    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: June 25, 2024
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Chong Zhang, Haiwei Lu, Chen Li
  • Publication number: 20230070458
    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 9, 2023
    Inventors: Roy Edward Meade, Chong Zhang, Haiwei Lu, Chen Li
  • Patent number: 11500153
    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: November 15, 2022
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Chong Zhang, Haiwei Lu, Chen Li
  • Patent number: 11156773
    Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: October 26, 2021
    Assignee: Ayar Labs, Inc.
    Inventors: Haiwei Lu, Chen Li, John Fini, Chong Zhang, Roy Edward Meade
  • Publication number: 20210109284
    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 15, 2021
    Inventors: Roy Edward Meade, Chong Zhang, Haiwei Lu, Chen Li
  • Publication number: 20210080647
    Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 18, 2021
    Inventors: Haiwei Lu, Chen Li, John Fini, Chong Zhang, Roy Edward Meade
  • Publication number: 20140120293
    Abstract: The present disclosure relates to the field of fabricating microelectronic devices, wherein a microelectronic device substrate, such as a microelectronic wafer, may be diced into individual microelectronic dice using an adhesive tape which reduces the potential of electrostatic discharge damage by the incorporation or anti-static, and may be compatible with a laser scribing process by the incorporation of ultraviolet light absorbing agents into an adhesive layer of the adhesive tape.
    Type: Application
    Filed: December 22, 2011
    Publication date: May 1, 2014
    Inventors: Mohit Gupta, Haiwei Lu, Dingying D. Xu, Ninad Patel, Kowtilya Bijjula, P. Erasenthiran Poonjolai