Abstract: One embodiment relates a method of receiving data from a multi-lane data link. The data is encoded with an FEC code having a block length. The data is FEC encoded at a bus width which is specified within particular constraints. One constraint is that the FEC encoder bus width in bits is an exact multiple of a number of bits per symbol in the data. Another constraint may be that the FEC code block length is an exact multiple of the FEC encoder bus width. Another constraint may be that the FEC encoder bus width is an exact multiple of a number of serial lanes of the multi-lane interface. Other embodiments and features are also disclosed.

Abstract: Integrated circuits with pseudo random bit sequence (PRBS) generation circuitry are provided. The PRBS generation circuitry may be configured to support parallel output generation in multiple modes, where the parallel bit width in each mode can be different. The PRBS generation circuitry may include a linear feedback shift register that implements a desired polynomial, one or more XOR tree circuits that produces the parallel output bits, a multiplexer for selectively routing a subset of the parallel output bits back to the input of the shift register, and a gearbox for performing an adjustable bit width conversion. Configured in this way, the PRBS generation circuitry can provide parallel PRBS generation with an adjustable bit width.

Abstract: One embodiment relates a method of receiving data from a multi-lane data link. The data is encoded with an FEC code having a block length. The data is FEC decoded at a bus width which is specified within particular constraints. One constraint is that the FEC decoder bus width in bits is an exact multiple of a number of bits per symbol in the data. Another constraint may be that the FEC code block length is an exact multiple of the FEC decoder bus width. Another constraint may be that the FEC decoder bus width is an exact multiple of a number of serial lanes of the multi-lane interface. Other embodiments and features are also disclosed.

Abstract: Systems and methods and systems are disclosed for allowing the medium access control (MAC) layer in a communication system within an integrated circuit or device to accurately determine a timestamp point and a timestamp value when, for example, the Precision Time Protocol (PTP) protocol is in use by the communication system. Such determination of accurate timestamp point and timestamp value may be used by the communication system to account for and to compensate for the time shift(s) from forward error correction (FEC) sublayer changes in a data frame that is transmitted by the MAC layer. Feedback is provided to the MAC from the FEC to allow the MAC to accurately determine the timestamp point and timestamp value align preamble of the data frame to the beginning of the FEC bit block that is output by the FEC sublayer.

Abstract: Systems, methods, apparatus, and techniques relating to a transmitter interface are disclosed. A soft-IP transmitter interface includes a Reed-Solomon encoder operating according to any one of multiple bus width and bandwidth parameter pairs, and a gearbox module that includes multiple gearboxes. The multiple gearboxes receive input data at a bus width and clock rate parameter pair specified by the soft-IP transmitter interface and convert the input data into output data according to a number of physical lanes and bandwidth parameter pair specified by a physical medium attachment (PMA) standard.

Abstract: One embodiment relates to a frame detection circuit for detecting a frame boundary. The circuit includes at least two frame buffers and a staged-parallel structure of syndrome computation circuits that computes a number of syndromes in one cycle. The two frame buffers are each one word in width. The number of syndromes computed in one cycle by the cascaded series is a fraction of a number of bits in one word. Another embodiment relates to a method for detecting a frame boundary. Another embodiment relates to a method for computing a current syndrome. Other embodiments, aspects, and features are also disclosed.

Abstract: Systems and methods and systems are disclosed for allowing the medium access control (MAC) layer in a communication system within an integrated circuit or device to accurately determine a timestamp point and a timestamp value when, for example, the Precision Time Protocol (PTP) protocol is in use by the communication system. Such determination of accurate timestamp point and timestamp value may be used by the communication system to account for and to compensate for the time shift(s) from forward error correction (FEC) sublayer changes in a data frame that is transmitted by the MAC layer. Feedback is provided to the MAC from the FEC to allow the MAC to accurately determine the timestamp point and timestamp value align preamble of the data frame to the beginning of the FEC bit block that is output by the FEC sublayer.

Abstract: In order to reproduce audio signals which have been compressed or encoded for storage or transmission using, for example, MPEG audio encoding, a synthesis sub-band filter is employed which performs an inverse modified discrete cosine transform. The computational cost of the IMDCT implementation is reduced by pre-calculating arrays of sum and difference data. The arrays of sum and difference data are then used in two separate transform calculations, the results of which can be used in the generation of pulse code modulation audio data.

Abstract: In order to reproduce audio signals which have been compressed or encoded for storage or transmission using, for example, MPEG audio encoding, a synthesis sub-band filter is employed which performs an inverse modified discrete cosine transform. The computational cost of the IMDCT implementation is reduced by pre-calculating arrays of sum and difference data. The arrays of sum and difference data are then used in two separate transform calculations, the results of which can be used in the generation of pulse code modulation audio data.

Abstract: A method and apparatus for computing and comparing the LLR of a 32-QAM mapping by splitting the mapping point to a most significant bit and four Least Significant Bits. Forming two groups based upon the characteristic of the most significant bit. Use the characteristics of an associated 16-QAM mapping to compute the four Least Significant Bits of the 32-QAM mapping.

Abstract: A receiver comprises a method is provided. The method has the step of: determining a transmission parameter signaling (TPS) parameter based a group of vectors inherent to a communication system.

Abstract: A receiver having a de-interleaver with a processor for processing interleaved data; and a built-in eDRAM coupled to the processor for processing the interleaved data is provided.

Abstract: A method and apparatus for a receiver comprises: a plurality of paths with each path associated with an independent antenna. Each path comprises: a channel estimation device associated with a particular channel; and a set of parameters denoting channel characteristic associated with each path. The receiver further comprises a time de-interleaver or FEC decoder shared by the plurality of paths. Whereby at least one device that use significant amount of memory is shared by the plurality of paths.

Abstract: A method for selecting parameter comprising the steps of: providing a plurality of paths each path associated with an independent antenna, and each path comprising: a set of parameters associated with a particular channel; and deriving a parameter among each and every of the set of parameters associated with a particular channel. The method further comprises the step of providing a time de-interleaver or FEC decoder shared by the plurality of paths.

Abstract: A transmitter comprising: a digital encoder for encoding incoming digital information; and a digital to analog converter for converting the encoded digital information into analog information is described. The transmitter further comprises an exact time framing block disposed between the digital encoder and the digital to analog converter. The exact time framing block receives the digitally encoded information and comprises a method for synchronization. The method including the steps of: providing a clock signal having at least two adjacent pulses; providing information subjected to transmission in the form of a set of frames; and accommodating a whole number of frames between the two adjacent pulses.

Abstract: A new, improved method for mix min-sum decoding using a LDPC code is provided. In order to reconcile the drawbacks of the belief propagation (BP) and min-sum method, but at the same to keep the benefit of same, two major improvements have been proposed in the present invention. In the hardware implementation, due to using fixed-point implementation, it is found the better results lower error floor occurs. The second one has better performance in the range of BER=1e-3 to 1e-6. This invention proposes a method to combine the two improved methods into one, thereby achieving good performances at both cliff region and floor region.

Abstract: This invention relates to the architecture of a 3780-point forward and inverse Fast Fourier Transform (DFT), which is used in a TDS-OFDM system. The number 3780 is factored to 3*3* . . . *3*M. Where M is a natural number that cannot be factored by 3.

Abstract: An OFDM (Orthogonal frequency-division multiplexing) communication system is provided. The system includes at least two programs being simultaneously transmitted under one spectrum. Each program is respectively modulated under a different or similar scheme. Each of the at least two programs commonly share a control frame. The control frame is transmitted under a similar or more robust modulation scheme than the at least two programs' modulations respectively.

Abstract: Method and system for determining the number of one or more of a sequence of M+1 consecutive OFDM frames from analysis of the designated preambles of two or more consecutive frames (m=0, 1, . . . , M; M?1). An overlap function OF(m;k) is formed for each frame with a sequence of selected reference signals indexed by k (k=1, 2, . . . , K), dependent upon the frame number m and the index k, and a phase (sequence location corresponding to largest amplitude of overlap function) is determined. An Mth-order phase difference is computed that corresponds to frame number of one of the M+1 frames. A consistency check is provided for the phase numbers.

Abstract: An audio decoder solution is here provided where a reduction in computing power is required. The proposed method consists of forcing the multiple output channels to only one type of inverse transformation format. A format of long transform length is more suitable for input signals whose spectrum remains stationary or quasi-stationary. This provides a greater frequency resolution, improved coding performance and a reduction of computing power required. Another format of two or more short transform lengths, possessing greater time resolution, is more desirable for rapidly changing signals with time. The computer power required for two or more short transforms should be higher than for only one transformation. The time versus frequency resolution trade-off should be considered when selecting a transform block length. Advantage is taken of human hearing behaviour to reduce the computing power of a processing engine (e.g. DSP) when downmixing from an M-channel input to a P-channel output is required.