Abstract: An autonomous moving apparatus includes a moving unit that moves the autonomous moving apparatus, a detector that detects distances from surrounding objects and shapes of the surrounding objects, a notifying unit that notifies surrounding persons, and a controller that controls the moving unit so that the autonomous moving apparatus moves so as to follow movement of a person recognized as a follow target by the detector and, when the person recognized as the follow target performs a specific action, controls the notifying unit to give a notification by a preset notification method in response to the specific action.

Abstract: An information processing system includes one or more image capturing devices and circuitry. The one or more image capturing devices capture a first slip and a second slip to generate one or more images. The first slip has a first image code corresponding to a first type of identification information thereon, and the second slip has a second image code corresponding to a second type of identification information thereon. The circuitry is to manage a position of the first slip based on the first image code recognized from the one or more images, manage a position of the second slip based on the second image code recognized from the one or more images, and display the position of the second slip in response to an operation performed by a user.

Abstract: A semiconductor memory device according to the present invention has a memory cell array, a write-driving/bias-reading circuit, a control circuit and a sense amplifier. The control circuit outputs a VSLC (Verify Sense Load Control) signal generated according to writing data. After the write-driving/bias-reading circuit applied the writing pulse and the complementary writing pulse, the sense amplifier receives the VSLC signal and detects the current difference between two currents respectively flowing through a first data line and a second data line; the first data line and the second data line respectively connecting a true memory cell and a complementary memory cell of the selected pair of memory cell. The control circuit controls to provide the additional current to at least one of the first data line and the second data line so as to make the detected current difference meet the required margin.

Abstract: The disclosure provides a semiconductor memory device that improves the reliability of data reading and achieves good area efficiency. A variable resistance memory of the disclosure includes a memory array, a row decoder, a column decoder, a writing part, and a reading part. The memory array includes a plurality of memory cells. The row decoder selects the memory cells in a row direction. The column decoder selects the memory cells in a column direction. The writing part writes identical data to a pair of memory cells that is selected. The reading part reads the data stored in the pair of memory cells that is selected. The reading part includes a sense amplifier that compares a total of the currents respectively flowing through the pair of memory cells with a reference value.

Abstract: Provided is a pharmaceutical composition for oral administration in which the solubility and/or dissolution properties of enzalutamide are improved and supersaturation is maintained. Also provided is a pharmaceutical composition for oral administration in which the oral absorbability of enzalutamide is improved. The pharmaceutical composition for oral administration comprises enzalutamide and polyvinyl alcohol.

Abstract: The disclosure provides a semiconductor memory device that improves the reliability of data reading and achieves good area efficiency. A variable resistance memory of the disclosure includes a memory array, a row decoder, a column decoder, a writing part, and a reading part. The memory array includes a plurality of memory cells. The row decoder selects the memory cells in a row direction. The column decoder selects the memory cells in a column direction. The writing part writes identical data to a pair of memory cells that is selected. The reading part reads the data stored in the pair of memory cells that is selected. The reading part includes a sense amplifier that compares a total of the currents respectively flowing through the pair of memory cells with a reference value.

Abstract: A first erase test is performed by applying an erase pulse to series of memory cells which are included in a memory cell array and which are divided into a plurality of groups until the appearance of a group for which the determination that erase is completed is made. A second erase test is performed on other series of memory cells including the series of memory cells on the basis of the number of erase pulses at the time of detecting a group for which the determination that erase is completed is made first.

Abstract: The network apparatus (switch 10) of the communication system, which has the path table for registering a MAC address of the facing device which faces the device and a lending MAC address set in advance so as to be correlated with each other, and the MAC table for registering a MAC address inherent in a device connected to the apparatus itself, and path identification information for specifying a combination between a MAC address of a facing device in the path table to which the device is to refer and a lending MAC address so as to be correlated with each other, generates path identification information and registers the same at the path table when communicating through a pseudo wire, and resets the pseudo wire based on the path table and the MAC table when a device in communication is changed through the pseudo wire.

Abstract: The network apparatus (switch 10) of the communication system, which has the path table for registering a MAC address of the facing device which faces the device and a lending MAC address set in advance so as to be correlated with each other, and the MAC table for registering a MAC address inherent in a device connected to the apparatus itself, and path identification information for specifying a combination between a MAC address of a facing device in the path table to which the device is to refer and a lending MAC address so as to be correlated with each other, generates path identification information and registers the same at the path table when communicating through a pseudo wire, and resets the pseudo wire based on the path table and the MAC table when a device in communication is changed through the pseudo wire.

Abstract: A control method for a nonvolatile storage device having a storage mode in which in a memory cell provided with a trapping dielectric layer 1-bit data is stored depending on the presence or absence of charge in a first trapping region. In a dynamic reference cell initialization operation, a charge accumulation operation is performed, as a preset operation in the initialization operation, on second trapping regions of first and second dynamic reference cells to a charge accumulation operation on a second trapping region of the memory cell. In addition, at the time of data rewrite, preprogram verification and preprogramming are performed on the first trapping regions. This makes it possible to shorten the time taken for initialization and data rewrite.

Abstract: A control method for a nonvolatile storage device having a storage mode in which in a memory cell provided with a trapping dielectric layer 1-bit data is stored depending on the presence or absence of charge in a first trapping region. In a dynamic reference cell initialization operation, a charge accumulation operation is performed, as a preset operation in the initialization operation, on second trapping regions of first and second dynamic reference cells to a charge accumulation operation on a second trapping region of the memory cell. In addition, at the time of data rewrite, preprogram verification and preprogramming are performed on the first trapping regions. This makes it possible to shorten the time taken for initialization and data rewrite.

Abstract: A semiconductor nonvolatile memory in which read operations are carried out during write operations, includes: a core having a plurality of cell transistors for storing data; and a write verify circuit for detecting change in a core cell transistor's characteristic during a write operation in which the gate voltage/drain current characteristic of the cell transistor is changed to a condition corresponding to stored data by injecting a charge into or extracting a charge from the core cell transistor; and further includes a write verify inhibition signal generation circuit for generating a write verify inhibition signal in order to deactivate the write verify circuit during a read operation to the core cell transistor. The generation of a mistaken verify decision by the write verify circuit, due to a change in the power supply potential accompanying large current during a read operation, is prevented, as is malfunction of the write verify.

Abstract: A semiconductor nonvolatile memory in which read operations are carried out during write operations, includes: a core having a plurality of cell transistors for storing data; and a write verify circuit for detecting change in a core cell transistor's characteristic during a write operation in which the gate voltage/drain current characteristic of the cell transistor is changed to a condition corresponding to stored data by injecting a charge into or extracting a charge from the core cell transistor; and further includes a write verify inhibition signal generation circuit for generating a write verify inhibition signal in order to deactivate the write verify circuit during a read operation to the core cell transistor. The generation of a mistaken verify decision by the write verify circuit, due to a change in the power supply potential accompanying large current during a read operation, is prevented, as is malfunction of the write verify.

Abstract: The present invention provides an activated carbon produced by a process, which includes: activating a carbonaceous material, to obtain an activated carbonaceous material; and contacting the activated carbonaceous material with an acid. Another embodiment of the present invention provides an electrode for an electric double-layer capacitor, which includes the above-described activated carbon. Another embodiment of the present invention provides a filter, which includes the above-described activated carbon. Another embodiment of the present invention provides a shaped article, which includes the above-described activated carbon. Another embodiment of the present invention provides a method for producing activated carbon, which includes activating a carbonaceous material, to obtain an activated carbonaceous material; and contacting the activated carbonaceous material with an acid, to obtain the activated carbon.