Patents by Inventor Hajime Eda

Hajime Eda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190266565
    Abstract: A process design support apparatus includes: a part list storage part that holds a part list representing a part(s) included in a product; a process list storage part that holds a process list representing a process(es) included in a process sequence(s); and an association part that associates an item(s) included in the part list with an item(s) included in the process list.
    Type: Application
    Filed: November 9, 2017
    Publication date: August 29, 2019
    Applicant: NEC Corporation
    Inventors: Mitsuteru TANOUE, Kazutoshi YONEKURA, Hajime EDA
  • Patent number: 10283383
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: May 7, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Akifumi Gawase, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 10010997
    Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: July 3, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki, Yosuke Otsuka, Hajime Eda
  • Publication number: 20160129548
    Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.
    Type: Application
    Filed: September 8, 2015
    Publication date: May 12, 2016
    Inventors: Akifumi GAWASE, Yukiteru MATSUI, Takahiko KAWASAKI, Yosuke OTSUKA, Hajime EDA
  • Publication number: 20150357212
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 9174322
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming a polish target film on a substrate and conducting a CMP process for the polish target film. The conducting the CMP process includes bringing a surface of the polish target film into contact with a surface of a polishing pad with a negative Rsk value, and adjusting friction dependency on polishing speed between the polish target film and the polishing pad to a value that restrains the occurrence of a stick slip to polish the polish target film.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: November 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Akifumi Gawase, Hajime Eda
  • Patent number: 9144879
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: September 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi Gawase, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 9012246
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a wiring groove on an insulating film; forming a barrier metal layer and a metal layer; polishing the metal layer by applying a first load on the metal layer; and subsequently polishing the metal layer while applying a second load larger than the first load on the metal layer and spraying a gas onto a polishing pad. The polishing pad is in contact with the metal layer. The barrier metal layer covers an upper surface of the insulating film and an inner surface of the wiring groove, and the metal layer fills an inside of the wiring groove and covers the barrier metal layer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Eda, Gaku Minamihaba, Yukiteru Matsui, Akifumi Gawase
  • Publication number: 20150004878
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming a polish target film on a substrate and conducting a CMP process for the polish target film. The conducting the CMP process includes bringing a surface of the polish target film into contact with a surface of a polishing pad with a negative Rsk value, and adjusting friction dependency on polishing speed between the polish target film and the polishing pad to a value that restrains the occurrence of a stick slip to polish the polish target film.
    Type: Application
    Filed: February 28, 2014
    Publication date: January 1, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiteru Matsui, Akifumi Gawase, Hajime Eda
  • Publication number: 20140365279
    Abstract: Provided is an information management device (10) that includes a matrix display unit (15) that displays a two-dimensional matrix table, displays some or all of required qualities required for a first commercial product and specification items associated with the first commercial product, as vertical direction elements, in a vertical column in the two-dimensional matrix table, and displays some or all of the required qualities required for the first commercial product and the specification items associated with the first commercial product, as horizontal direction elements, in a horizontal row in the two-dimensional matrix table, a relationship information reception unit (16) that receives an input of relationship information indicating strength of correspondence between the vertical direction element (required quality or specification item) and the horizontal direction element (required quality or specification item) with respect to a cell at an intersection between the vertical direction element and the hor
    Type: Application
    Filed: January 17, 2013
    Publication date: December 11, 2014
    Applicant: NEC Corportion
    Inventors: Hajime Eda, Yoshiaki Matsubara, Kazuki Tsuji, Mitsuteru Tanoue
  • Publication number: 20140220778
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Application
    Filed: September 9, 2013
    Publication date: August 7, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 8754433
    Abstract: According to one embodiment, a semiconductor device includes a switch element provided in a surface area of a semiconductor substrate, a contact plug with an upper surface and a lower surface, and a function element provided on the upper surface of the contact plug. The lower surface of the contact plug is connected to the switch element. The upper surface of the contact plug has a maximum roughness of 0.2 nm or less.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Gaku Minamihaba, Hajime Eda, Masayoshi Iwayama, Minoru Amano, Masatoshi Yoshikawa, Motoyuki Sato, Kyoichi Suguro, Masako Kodera
  • Publication number: 20140004628
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a wiring groove on an insulating film; forming a barrier metal layer and a metal layer; polishing the metal layer by applying a first load on the metal layer; and subsequently polishing the metal layer while applying a second load larger than the first load on the metal layer and spraying a gas onto a polishing pad. The polishing pad is in contact with the metal layer. The barrier metal layer covers an upper surface of the insulating film and an inner surface of the wiring groove, and the metal layer fills an inside of the wiring groove and covers the barrier metal layer.
    Type: Application
    Filed: February 27, 2013
    Publication date: January 2, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime EDA, Gaku Minamihaba, Yukiteru Matsui, Akifumi Gawase
  • Publication number: 20140004775
    Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes polishing a metal layer provided on a surface of a wafer, while supplying slurry to a polishing pad and spraying gas to the polishing pad. The slurry includes an inorganic particle, a resin particle, an oxidant for oxidizing the metal layer, a complexing agent for forming an organic complex on a surface of the metal layer, and a surfactant for forming a hydrophilic film on a surface of the organic complex. The resin particle includes a functional group on a surface, the functional group having a same kind of polarity as that of the inorganic particle. The resin particle contains polystyrene incorporated at a concentration of 0.001% by weight or more and 0.1% by weight or less, and has an average particle diameter of 200 nm or more and 1 ?m or less.
    Type: Application
    Filed: February 28, 2013
    Publication date: January 2, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime EDA, Gaku MINAMIHABA, Yukiteru MATSUI
  • Publication number: 20130331004
    Abstract: According to one embodiment, a semiconductor device manufacturing method comprises forming a film to be polished on a semiconductor substrate, and performing a CMP method on the film to be polished. The CMP method includes polishing the film to be polished by bringing a surface of the film to be polished into contact with a surface of a polishing pad having a negative Rsk value.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 12, 2013
    Inventors: Gaku MINAMIHABA, Akifumi Gawase, Hajime Eda, Yukiteru Matsui, Satoshi Kamo, Naoki Nishiguchi, Ayako Maekawa
  • Publication number: 20130331005
    Abstract: According to one embodiment, a semiconductor device manufacturing method comprises conditioning a polishing pad by pressing a dresser against a surface of the polishing pad while keeping a surface temperature of the polishing pad at 40° C. or higher, and chemically mechanically polishing a polishing target film formed on a semiconductor substrate by pressing a surface of the polishing target film against the surface of the polishing pad having a negative Rsk value.
    Type: Application
    Filed: March 14, 2013
    Publication date: December 12, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Gaku MINAMIHABA, Hajime EDA, Yukiteru MATSUI
  • Patent number: 8575030
    Abstract: According to one embodiment, a semiconductor device manufacturing method is disclosed. The method can include polishing a film on a semiconductor substrate by pressing the film against a polishing pad. Polishing the film comprises performing first polishing in which an entrance temperature of the polishing pad is adjusted to 40° C. (inclusive) to 50° C. (inclusive), and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature. Polishing the film comprises performing second polishing in which the entrance temperature is adjusted to 30° C. or less, and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: November 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gaku Minamihaba, Yukiteru Matsui, Nobuyuki Kurashima, Hajime Eda
  • Publication number: 20130290365
    Abstract: In order to solve a problem to provide means for facilitating creation and management of a component table, there is provided a component management apparatus which arranges and manages components of a plurality of products, arranges and manages common components that are common in all of the plurality of products and optional components which are different for each product, associates and manages the optional components with specific requirements that are set for each product to determine whether to use the optional components, and manages specific requirements that are associated with each product and set for each product.
    Type: Application
    Filed: November 29, 2011
    Publication date: October 31, 2013
    Applicants: NEC SYSTEM TECHNOLOGIES, LTD., NEC CORPORATION
    Inventors: Mitsuteru Tanoue, Hajime Eda, Yumiko Fujimoto
  • Publication number: 20130095661
    Abstract: According to one embodiment, a CMP method includes starting a polishing of a silicon oxide film by using a slurry including a silicon oxide abrasive and a polishing stopper film including a silicon nitride film, and stopping the polishing when the polishing stopper is exposed. The slurry includes a first water-soluble polymer with a weight-average molecular weight of 50000 or more and 5000000 or less, and a second water-soluble polymer with a weight-average molecular weight of 1000 or more and 10000 or less.
    Type: Application
    Filed: March 23, 2012
    Publication date: April 18, 2013
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Publication number: 20130078784
    Abstract: According to one embodiment, the CMP slurry includes abrasive particles made of colloidal silica in an amount of 0.5 to 3% by mass of a total mass of the CMP slurry, and a polycarboxylic acid having a weight average molecular weight of from 500 to 10,000, in an amount of 0.1 to 1% by mass of the total mass of the CMP slurry. 50 to 90% by mass of the abrasive particles each has a primary particle diameter of 3 to 10 nm. The CMP slurry has a pH within a range of 2.5 to 4.5.
    Type: Application
    Filed: March 21, 2012
    Publication date: March 28, 2013
    Inventors: Gaku MINAMIHABA, Akifumi Gawase, Yukiteru Matsui, Hajime Eda