Patents by Inventor Hajime Hasebe

Hajime Hasebe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10490486
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 26, 2019
    Assignees: Renesas Electronics Corporation, Renesas Semiconductor Package & Test Solutions Co., Ltd.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Publication number: 20190027427
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 24, 2019
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Patent number: 10115658
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: October 30, 2018
    Assignees: RENESAS ELECTRONICS CORPORATION, RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Publication number: 20170033033
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Patent number: 9496204
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: November 15, 2016
    Assignees: RENESAS ELECTRONICS CORPORATION, RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Publication number: 20140084440
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: November 26, 2013
    Publication date: March 27, 2014
    Applicants: HITACHI HOKKAI SEMICONDUCTOR LTD., RENESAS ELECTRONICS CORPORATION
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Patent number: 8618642
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 31, 2013
    Assignees: Renesas Electronics Corporation, Hitachi Hokkai Semiconductor Ltd.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Patent number: 8581396
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: November 12, 2013
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Patent number: 8558362
    Abstract: The outflow of die bond material is prevented and the quality and reliability of a semiconductor device are improved. A tab, a plurality of leads arranged around the tab, silver paste arranged on a chip supporting surface of the tab, and a semiconductor chip mounted via silver paste on the tab are included. Further, a plurality of wires which electrically connect a pad of the semiconductor chip, a lead, and a sealing body which does the resin seal of the semiconductor chip and the wires are also included. By forming a step part whose height is lower than the chip supporting surface at an edge part of the chip supporting surface of the tab, the silver paste protruded from the tab can be stopped at the step part. As a result, an outflow to the back surface of the sealing body of silver paste can be prevented.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: October 15, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Kenji Amano, Hajime Hasebe
  • Patent number: 8102035
    Abstract: According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: January 24, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kenji Amano, Hajime Hasebe
  • Publication number: 20120007225
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicants: HITACHI HOKKAI SEMICONDUCTOR LTD., RENESAS ELECTRONICS CORPORATION
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Publication number: 20120007224
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicants: HITACHI HOKKAI SEMICONDUCTOR LTD., RENESAS ELECTRONICS CORPORATION
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Patent number: 8044509
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: October 25, 2011
    Assignees: Renesas Electronics Corporation, Hitachi Hokkai Semiconductor Ltd.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Publication number: 20110186976
    Abstract: According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenji Amano, Hajime Hasebe
  • Patent number: 7948068
    Abstract: According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: May 24, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kenji Amano, Hajime Hasebe
  • Publication number: 20110095412
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: December 30, 2010
    Publication date: April 28, 2011
    Applicants: RENESAS ELECTRONICS CORPORATION, HITACHI HOKKAI SEMICONDUCTOR, LTD.
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Patent number: 7911054
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: March 22, 2011
    Assignees: Renesas Electronics Corporation, Hitachi Hokkai Semiconductor Ltd.
    Inventors: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
  • Patent number: 7579674
    Abstract: A semiconductor device with improved reliability is provided. The semiconductor device in a QFN package configuration has a semiconductor chip mounted on a tab, leads which are alternately arranged around the tab and electrically connected to the electrodes of the semiconductor chip via bonding wires, and an encapsulating resin portion for encapsulating therein the semiconductor chip and the bonding wires. The lower exposed surfaces of the leads are exposed at the outer peripheral portion of the back surface of the encapsulating resin portion to form external terminals. The lower exposed surfaces of the leads are exposed at the portion of the back surface of the encapsulating resin portion which is located inwardly of the lower exposed surface of the leads to also form external terminals.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: August 25, 2009
    Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.
    Inventors: Kenji Amano, Atsushi Fujisawa, Hajime Hasebe
  • Publication number: 20090189260
    Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.
    Type: Application
    Filed: March 25, 2009
    Publication date: July 30, 2009
    Applicants: RENESAS TECHNOLOGY CORP., HITACHI HOKKAI SEMICONDUCTOR, LTD.
    Inventors: Hajime HASEBE, Tadatoshi DANNO, Yukihiro SATOU
  • Publication number: 20090176335
    Abstract: According to the method of manufacturing a semiconductor device, a lead frame is provided wherein the thickness of a tab-side end portion of a silver plating for wire connection formed on each suspending lead 1e is smaller than that of a silver plating formed on each lead. Thereafter, a semiconductor chip is mounted onto a tab. In this case, since the entire surface of the silver plating on the suspending lead 1e is in a crushed state, it is possible to prevent contact of the semiconductor chip with the silver plating when mounting the chip onto the tab. Consequently, in a die bonding process, the semiconductor chip can slide on the tab without contacting the silver plating and thereby making it possible to diminish damage to the semiconductor chip when mounted onto the tab and hence to possibly prevent cracking or chipping of the chip when assembling the semiconductor device.
    Type: Application
    Filed: March 10, 2009
    Publication date: July 9, 2009
    Inventors: Kenji Amano, Hajime Hasebe