Patents by Inventor Hajime Inuzuka

Hajime Inuzuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6559480
    Abstract: A semiconductor device possessing a semiconductor substrate consisting of a single element semiconductor; directly formed on the semiconductor substrate, a buffer layer consisting of a compound semiconductor possessing a lattice constant differing from the lattice constant of the single element semiconductor; laminated on the buffer layer, an active layer consisting of the same compound semiconductor as the buffer layer, which functions as a semiconductor element; and, disposed between the buffer layer and the active layer, a barrier layer forming a voltage barrier against the active layer so as to control the flow of current from the active layer to the semiconductor substrate: and in the case where this is utilized as a Hall element, a semiconductor device is obtained which maintains good carrier mobility as a Hall element, and also, the leakage current to the substrate can be controlled, and therefore sufficient Hall electromotive force can be obtained.
    Type: Grant
    Filed: March 23, 1994
    Date of Patent: May 6, 2003
    Assignee: Denso Corporation
    Inventors: Hajime Inuzuka, Yasutoshi Suzuki
  • Patent number: 5838174
    Abstract: To prevent leakage of light from a waveguide path to an isolation film in a photocoupler, isolation films are formed so that end portions thereof face a substrate, and a photodiode and phototransistor are formed on islands surrounded by these isolation films. Accordingly, a waveguide path optically coupling the photodiode and photocoupler is formed on a silicon oxide film and on the end portions of the isolation films. The isolation films are formed by alternatingly laminating silicon oxide films having a refractive index smaller than the waveguide path and silicon nitride films having a refractive index equal to or greater than the waveguide path. Accordingly, the several film thicknesses of the silicon nitride films are established to be smaller than the wavelength of light within the silicon nitride films. Because of this, leakage of light from the waveguide path to the silicon nitride films of the isolation films can be prevented.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: November 17, 1998
    Assignee: Denso Corporation
    Inventors: Tsuyoshi Nakagawa, Yoshiaki Nakatsugawa, Hajime Inuzuka
  • Patent number: 5629534
    Abstract: There is provided a monolithic photocoupler which is easy to integrate. An SOI structure is formed by providing a first insulation layer on a silicon substrate. The semiconductor single crystal region is further divided by trench insulation layers into separate regions. Light emitting elements are formed on one of the separated semiconductor single crystal region and light receiving elements are formed on the other semiconductor single crystal region. The light emitting elements are obtained by forming light emitting diodes made of GaAs or the like on the substrate using a heterogeneous growth process. An optical waveguide made of a material which is optically transparent and electrically insulative such as a TiO.sub.2 film on each pair of light emitting and light receiving elements. The insulation layers constituted by SiO.sub.2 layers have a refractive index smaller that of the active layer of the substrate.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: May 13, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hajime Inuzuka, Naomi Awano, Takeshi Hasegawa, Masahito Mizukoshi
  • Patent number: 5610412
    Abstract: A semiconductor device having superior light output efficiency is disclosed. A p-Si diffusion layer is formed on a Si substrate and an n-Si diffusion layer is formed in the p-Si diffusion layer. An n-GaAs layer constituting an active region for emitting light is grown on the p-Si diffusion layer and the n-Si diffusion layer of the Si substrate and a p-GaAs layer constituting an active region for emitting light is grown on the n-GaAs layer. An upper electrode is disposed on an upper surface of the p-GaAs layer above the p-Si diffusion layer. Current is injected from the upper electrode through a region of the pn junction between the n-GaAs layer and the p-GaAs layer other than that directly below the upper electrode, and light is emitted from this region. The emitted light passes through the p-GaAs layer to outside the device without passing through and being attenuated by the upper electrode.
    Type: Grant
    Filed: October 19, 1995
    Date of Patent: March 11, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Naomi Awano, Hajime Inuzuka, Masahito Mizukoshi, Shigeki Kudomi
  • Patent number: 5578521
    Abstract: A silicon semiconductor substrate, on which an epitaxial layer is to be formed, is set in a reaction vessel having a heating mechanism, and a gas containing TMG and AsH.sub.3 is introduced into the reaction vessel with the substrate heated to 450.degree. C., thus forming, on the substrate, a low-temperature growth layer of amorphous or polycrystalline GaAs as a semiconductor substance having a different lattice constant from that of the substrate. Then, with the TMG removed from the introduced gas, the temperature of the semiconductor substrate is increased to 750.degree. C., to cause coagulation of atoms of the low-temperature growth layer, with a thermal treatment also being performed at this high temperature, to cause growth of island-like single crystal cores. Further, a high temperature growth process is conducted in a material gas atmosphere containing TMG, whereby a GaAs film is epitaxially grown on the semiconductor substrate surface.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: November 26, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Takamasa Suzuki, Kunihiko Hara, Hajime Inuzuka, Naomi Awano, Kouichi Hoshino
  • Patent number: 5329271
    Abstract: A semiconductor strain sensor includes a silicon substrate, a strain resistive element and electrodes. The silicon substrate has a deformable portion which is deformed when stress is applied to it. The strain resistive element is formed on the deformable portion and has an at least a first layer and a second layer which form a heterojunction between them. The first layer is doped with impurities so that a two-dimensional carrier gas layer is formed in the second layer near the heterojunction. The two-dimensional carrier gas layer has carriers originating from the impurities. The electrodes electrically contact the two dimensional carrier gas layer. Change of resistance of the strain resistive element in accordance with the stress is detected through the electrodes.
    Type: Grant
    Filed: May 4, 1992
    Date of Patent: July 12, 1994
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hajime Inuzuka, Tsuyoshi Nakagawa, Kunihiko Hara
  • Patent number: 5151764
    Abstract: A Group III and V element compound semiconductor such as gallium arsenide is formed on a semiconductor wafer by so-called MOCVD. A first pair of convex portions, a second pair of convex portions and crossing portion are formed from such compound semiconductor by an etching using a predetermined etching substance so that one convex portion of each pair is opposite to the other convex portion thereof and that a same crystalline surface of the crossing portion is exposed at all points where the first pair of convex portions crosses the second pair of convex portions. A pair of input terminals and a pair of output terminals are electrically connected to each convex portion of the first pair and the second pair, respectively so as to input electric current to each convex portion of the first pair and to output voltage generated in response to a magnetic field strength in such compound semiconductor.
    Type: Grant
    Filed: October 4, 1990
    Date of Patent: September 29, 1992
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Namoi Awano, Kouichi Hoshino, Hajime Inuzuka