Patents by Inventor Hajime Nobusawa

Hajime Nobusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6287911
    Abstract: A semiconductor device is provided, which is capable of high-speed operation of MOSFETs in a device section while suppressing the current leakage of MOSFETs in another device section even if the device is further miniaturized. This device is comprised of a semiconductor substrate, a first section defined on the substrate, a second section defined on the substrate, and a dielectric masking layer covering the first section while uncovering the second section. The first section includes a first MOSFET with a first pair of source/drain regions, a first gate insulating layer formed on the substrate, and a first gate electrode formed on the first gate insulating layer. No silicide layer is incorporated in each of the first pair of source/drain regions. The first MOSFET is covered with the masking layer in such a way that the first pair of source/drain regions of the first MOSFET are contacted with the masking layer.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: September 11, 2001
    Assignee: NEC Corporation
    Inventor: Hajime Nobusawa